Switching Buses

By Michael Feldman

August 31, 2007

With the launch of the Barcelona quad-core processor scheduled in a couple of weeks, AMD is hoping to salvage a rather miserable 2007 and build some momentum for next year. Regardless of how the Barcelona fares against Intel’s latest Xeon quad-core offerings, the Opterons are still the darlings of the HPC world. Because AMD long ago decided to forego the front side bus (FSB) and discrete memory controllers in favor of its HyperTransport interconnect and an integrated controller, the Opteron line is able to address some key requirements of HPC systems: scalability and memory performance.

But Intel is looking to level the playing field. Up until recently, the company has resisted changing its fundamental architecture in order to preserve investments it made around its FSB technology. But as multicore CPUs become more powerful, the need to alleviate the memory bottleneck and support cache coherent non-uniform memory architectures for multiprocessor (MP) platforms is forcing Intel to mirror AMD’s design. As part of Intel’s next-generation Nehalem microarchitecture in 2008, the company plans to support a HyperTransport-like interconnect called the Common System Interface (CSI), as well as an integrated memory controller. (CSI is apparently just the internal name at Intel; the rumor is that the commercial release will be called “QuickPath.”) Similar to HyperTransport, it will offer a high-bandwidth, low latency, point-to-point interconnect for system components.

At this point, it seems likely that the older FSB design will be retained in lower-end Nehalem processors, such as those destined for PCs, laptops and low-core-count, single-processor servers. But the Xeons targeted for the kinds of servers and workstations used to build high-end systems will almost certainly incorporate the new CSI and on-chip memory controller. These new microprocessors are scheduled to be rolled out in 2008 and 2009.

CSI and on-chip memory controllers will also be used in the next-generation “Tukwila” Itanium processors, which will debut in 2008. Itaniums, like their Xeon brethren, currently rely on large banks of on-chip cache to help circumvent the memory performance limitations inherent in the FSB/discrete memory controller architecture. The better performance provided by this new design should help the Itanium compete against its POWER and Sparc processor rivals.

Intel has released few details of the CSI architecture publicly. But David Kanter, Real World Technologies manager and editor, has managed to piece together a rather detailed description of the CSI design, apparently derived from Intel patent applications. In an analysis published this week, he discusses Intel’s CSI approach and the impact it could have on the x86 market.

Based on the Intel patents, a CSI physical link will be 5, 10 or 20 bits wide, depending upon the nature of the connection. Each link will provide as much as 24 to 32GB/s per link, which is on par with the 20.8 GB/s offered by HyperTransport 3.0 — the latest specification. Like HyperTransport, CSI will have the ability to dynamically configure link resources and optimize power usage.

Kanter believes that the introduction of CSI and on-chip memory controllers could substantially realign the Intel/AMD dichotomy in scaled-up servers. He estimates that Intel currently holds approximately a 50 percent share in multiprocessor servers, compared to 75-80 percent of the total x86 market. It would follow that if AMD were to lose its current architectural advantage in the MP server space, it could see its market share in this area cut by half or more.

Writes Kanter:

To Intel, the launch of a broad line of CSI based systems will represent one of the best opportunities to retake server market share from AMD. New systems will use the forthcoming Nehalem microarchitecture, which is a substantially enhanced derivative of the Core microarchitecture, and features simultaneous multithreading and several other enhancements. Historically speaking, new microarchitectures tend to win the performance crown and presage market share shifts. This happened with the Athlon, the Pentium 4, Athlon64/Opteron, and the Core 2 and it seems likely this trend will continue with Nehalem. The system level performance benefits from CSI and integrated memory controllers will also eliminate Intel’s two remaining glass jaws: the older front side bus architecture and higher memory latency.

No mention was made if Intel is considering a Torrenza-like socket specification to give third-party co-processors access to CSI via an open-standard socket. Although the use of Torrenza is not widespread today, it is gaining some traction, especially in the HPC realm where DRC and XtremeData have built socket-pluggable FPGA co-processor modules for application acceleration. While Intel hasn’t embraced third-party co-processing the way AMD has, a CSI-friendly socket standard would seem to be a logical strategy to counter Torrenza.

Over the next several months, much attention is going to paid to Intel’s next-generation 45nm Penryn processors. They will certainly give Intel the ability to offer a greater range of performance and low-power offerings. But for HPC users, the real revolution is still a year or two away in CSI. If Intel manages to use this technology to close the MP scalability and memory performance gap with its rival, AMD will be forced to innovate in other ways. If you’re Intel or AMD, the competition will be challenging, but the rest of the industry gets to enjoy the benefits.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion XL — were added to the benchmark suite as MLPerf continues Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing power it brings to artificial intelligence.  Nvidia's DGX Read more…

Call for Participation in Workshop on Potential NSF CISE Quantum Initiative

March 26, 2024

Editor’s Note: Next month there will be a workshop to discuss what a quantum initiative led by NSF’s Computer, Information Science and Engineering (CISE) directorate could entail. The details are posted below in a Ca Read more…

Waseda U. Researchers Reports New Quantum Algorithm for Speeding Optimization

March 25, 2024

Optimization problems cover a wide range of applications and are often cited as good candidates for quantum computing. However, the execution time for constrained combinatorial optimization applications on quantum device Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at the network layer threatens to make bigger and brawnier pro Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HBM3E memory as well as the the ability to train 1 trillion pa Read more…

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HB Read more…

Nvidia Looks to Accelerate GenAI Adoption with NIM

March 19, 2024

Today at the GPU Technology Conference, Nvidia launched a new offering aimed at helping customers quickly deploy their generative AI applications in a secure, s Read more…

The Generative AI Future Is Now, Nvidia’s Huang Says

March 19, 2024

We are in the early days of a transformative shift in how business gets done thanks to the advent of generative AI, according to Nvidia CEO and cofounder Jensen Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Nvidia Showcases Quantum Cloud, Expanding Quantum Portfolio at GTC24

March 18, 2024

Nvidia’s barrage of quantum news at GTC24 this week includes new products, signature collaborations, and a new Nvidia Quantum Cloud for quantum developers. Wh Read more…

Alibaba Shuts Down its Quantum Computing Effort

November 30, 2023

In case you missed it, China’s e-commerce giant Alibaba has shut down its quantum computing research effort. It’s not entirely clear what drove the change. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

DoD Takes a Long View of Quantum Computing

December 19, 2023

Given the large sums tied to expensive weapon systems – think $100-million-plus per F-35 fighter – it’s easy to forget the U.S. Department of Defense is a Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Leading Solution Providers

Contributors

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

Google Introduces ‘Hypercomputer’ to Its AI Infrastructure

December 11, 2023

Google ran out of monikers to describe its new AI system released on December 7. Supercomputer perhaps wasn't an apt description, so it settled on Hypercomputer Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Intel Won’t Have a Xeon Max Chip with New Emerald Rapids CPU

December 14, 2023

As expected, Intel officially announced its 5th generation Xeon server chips codenamed Emerald Rapids at an event in New York City, where the focus was really o Read more…

IBM Quantum Summit: Two New QPUs, Upgraded Qiskit, 10-year Roadmap and More

December 4, 2023

IBM kicks off its annual Quantum Summit today and will announce a broad range of advances including its much-anticipated 1121-qubit Condor QPU, a smaller 133-qu Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire