As Intel and AMD take a break from beating each other about the quads, this week we’ll turn our attention to software — specifically, parallel programming. Yes, multicore processors, GPUs and FPGAs are all the rage; but without applications to run on them, they’re just pretty etchings. In this week’s issue we have three articles that discuss different software approaches to getting the most out of the new hardware.

In our first feature article, RapidMind Chief Scientist Michael McCool makes a case for data parallelism — not surprising, considering his company’s platform is all about exploiting that particular aspect of HPC applications. McCool’s contention is that traditional task parallelism is of only limited use, since this model is difficult to scale to the levels necessary for today’s multicore systems, much less the manycore systems of the future. The main problem here is that the memory bottleneck demands much more latency tolerance than can be achieved by the relatively low numbers of tasks that can be naturally teased out of a typical application.

Says McCool: “The solution to this dilemma is data parallelism. In data parallelism, the structure of the data is used to drive the creation of more and more parallel tasks as needed. Since larger problems with more data naturally result in more parallel tasks, a data-parallel approach results in a scalable solution that can automatically take advantage of more and more cores.”

McCool does make an important distinction between SPMD (Single Program, Multiple Data) parallelism and SIMD (Single Instruction Multiple Data) parallelism. The former is the more versatile, inasmuch as it avoids the latter’s limitation of relying on a single operation per data stream. In essence, SIMD implies vector processors, while SPMD can be applied to a variety of architectures.

In “Language Design for an Uncertain Hardware Future,” The MathWorks’ Rod Lurie contends that the implementation language should be selected with the domain expert in mind. The idea is that language should enable users to develop applications as quickly as possible, without having to worry about the target architecture. He suggests programmers take a two-pass approach to software development. In the first pass, they should concentrate on getting the algorithm correct, and not be concerned with performance issues. In the second pass, the programmer can go back and insert parallelism to optimize runtime execution. But the language system itself should be responsible for mapping the parallelism onto the underlying hardware.

According to Lurie: “In this two-pass model, domain experts, like the scientists and engineers who will be major consumers of high performance computing systems, should be able to express their ideas in a natural way, allowing them to explore their solution space rapidly. To maximize their productivity, these experts should be able to focus on their core competencies.”

The second pass is accomplished by annotating the original algorithm with parallel constructs, like PARFOR, MATLAB’s method of specifying parallel for-loops. Parallel annotation usually has the advantage of being compatible with non-parallel hardware. In other words, the parallel constructs will just be ignored when executed on a single-core platform.

To round out our trio, Visual Numerics’ Tim Leite writes about some of the difficulties of porting applications from legacy systems to clusters. The advantages of porting are obvious, but the obstacles can be formidable and include preserving elements like computational accuracy and portability. Multiple language support also can become a big issue when migrating software to a new platform. Leite suggests that using commercial numerical libraries to insulate the application from the underlying hardware can help to ease some of these porting pitfalls. He also notes that these same libraries often give the developer some specific support for MPI programming.

Writes Leite: “As compute clusters become more prevalent and powerful, computational libraries continue to evolve to assist the developer in leveraging the cluster technology. Building parallel processing-enabled applications can be difficult, and commercial libraries can help programmers avoid some of the issues associated with optimizing code for a cluster. In fact, some libraries have introduced techniques that assist not only the sophisticated programmer, but also the novice distributed computing developer.”

While each of the three approaches reflects the particular vendor’s offerings, they all have some important elements in common. One is the realization that existing commercial toolchains can be harnessed. Although the APIs in the vendor solutions are proprietary, they leverage standard language environments. For example, The RapidMind platform is built around a C++ framework and can take advantage of the large ecosystem of tools, libraries and applications that has grown up around that language. The MathWorks is fortunate to have its very own and very popular MATLAB language. It was originally developed with a single processor in mind, but the Distributed Computing Toolbox was added in 2004 to help users adapt their code for the emerging generation of parallel hardware. And finally, Visual Numerics’ IMSL libraries are written in the some of the most widely used languages today: C, C#, Java and Fortran. Almost without exception, commercial parallel software products are built on top of well-established languages.

Each software approach discussed here also pays a good deal of attention to maintaining portability across targets. Since application development has become one of the most severe bottlenecks in system deployment, any technology that can decouple the code from the hardware is greatly appreciated. With the recent proliferation of multicore processors, accelerator coprocessors and cluster architectures, there is a real motivation to make sure the software developer (and end-user) is insulated as much as possible from hardware concerns. RapidMind’s solution is perhaps the most ambitious in this regard. It’s designed to map application code to x86 CPUs, a number of GPUs, or the Cell processor.

Related to portability is scalability. Today’s clusters come in many sizes, from a few nodes to thousands. At the level of the processor, chipmakers are using Moore’s Law to double the core count every couple of years. If applications aren’t developed with scalability in mind, the code’s longevity will be tied to the hardware it was originally targeted for. In the brave new world of parallel architectures, the ability to automatically scale software is a necessity.

Admittedly, none of the current approaches to deal with parallel programming is without drawbacks. For one thing, each tends to focus on a single dimension of parallelism, usually either at the level of the processor or at the level of the cluster. And Lurie himself acknowledges that his two-pass model would be unnecessary if the underlying language had built-in intelligence to implicitly perform parallelization. Forcing the software writer to think in parallel is the single biggest obstacle to large-scale development of parallel codes. Today unfortunately, there are no magic bullets because there is no magic gun. A more general framework awaits.

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As always, comments about HPCwire are welcomed and encouraged. Write to me, Michael Feldman, at [email protected].