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October 26, 2007

The Week in Review

by John E. West

Here’s a collection of highlights, selected totally subjectively, from this week’s HPC news stream as reported at and HPCwire.

>>10 words and a link

Cray incorporates new debugging tool from Australian startup;

The OpenMP 3.0 draft is now available for public review;

The Green Grid releases latest technology studies;

Rosetta@home predicts 3D protein structure;

IBM ships 1,000th Power6 server;

Chipmaker quarterly results: AMD down, Intel up;

TotalView announces partnership to break into Japanese market;

HP announces largest deployment of new cooling technology;

Interactive Supercomputing raises $11M for Star-P;

>>Cray licenses relative debugging tool from down under

Australian startup Guardsoft has announced that they’re hooking up with HPC hardware manufacturer Cray, Inc. Cray will license Guardsoft’s novel debugging software into its environment for developers.

From the press release (

Guardsoft is based on innovative research and development led by Monash University’s Professor David Abramson in the Faculty of Information Technology. It uses a new technique called “relative” debugging, which allows programmers to trace errors introduced into software as it is modified, or ported from one system to another. Unlike traditional debugging techniques, relative debugging compares the execution of a new program with a reference version that is known to work.

>>NEC revs SX

NEC has officially announced the release of the next installment of its vector supercomputer, the SX-9. The SX-9 is said to be theoretically capable of peaking at 102.4 GFLOPS per single core. This translates to a total system peak performance rating of 839 TFLOPS. The system features also include shared memory of up to 1 TB and high performance interconnects running at 128 GB/s.

From the announcement (

“NEC’s vector supercomputers are being utilized in a wide array of fields, including advanced weather forecasting, aerospace, the environment and fluid dynamics, and have won praise from international and domestic universities and research organizations worldwide, as well as private corporations, for their high sustained performance and price competitiveness,” said Mr. Yoshikazu Maruyama, Senior Vice President and Member of the Board at NEC Corporation.

>>Microsoft admits defeat to the EU

You might remember that we reported back in September that Microsoft had lost its appeal in the European Union but hadn’t yet given up the ghost. The DailyTech is covering today’s announcement that MS called uncle (

First, a refresher:

In July 2006, Microsoft was fined €497 million ($710 million USD) for as a result of the 2004 antitrust ruling. The commission then raised the cap on Microsoft’s daily fines from $2.6 million USD to $3.8 million USD in July 2006. Two days later, Microsoft was fined an additional $375.4 million USD in July 2006 for failing to comply with the ruling.
Microsoft lost its appeal on September 17, 2007 and the initial €497 million fine was upheld.

Now on to this week’s news:

“I welcome that Microsoft has finally undertaken concrete steps to ensure full compliance with the 2004 decision,” said Kroes. “It is regrettable that Microsoft has only complied after a considerable delay, two court decisions, and the imposition of daily penalty payments.”

According to the agreement, Microsoft will have to make three separate changes to its practices, which mostly relate to the fees vendors have to pay to have their software access Microsoft’s servers.

  1. Software competitors must be given access to Microsoft interoperability information.
  2. Royalties for said information will be a one-time payment of €10,000 ($14,348 USD).
  3. Worldwide software license/patent royalties will be reduced from 5.95 percent to 0.4 percent.

>>Nallatech first FPGA vendor to support QuickPath

FPGA maker Nallatech has announced it will be the first FPGA vendor to support and deploy products on the Intel QuickPath interconnect. QuickPath is Intel’s latest high performance system interconnect for servers and workstation platforms. The new interconnect provides a high bandwidth, low latency and cache coherent environment for potentially connecting several multi-core CPUs or Nallatech “socket-filler” accelerators.

More at


John West is part of the team that summarizes the headlines in HPC news every day at You can contact him at Too busy to keep up? Make your commute productive and listen to the Weekly Takeout,’s weekly audio news summary of the HPC news week in review.