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November 9, 2007

Compilers and More: Gloptimizations

Michael Wolfe

In my last column, I discussed the performance improvements on one of the SPEC CPU2000 floating point benchmarks, 172.mgrid, between 1999 and 2006, and introduced an optimization (which we call Loop-Carried Redundancy Elimination) that improves mgrid significantly. The SPEC CPU committee has been quite careful with benchmarks that are sensitive to compiler tricks. The original SPEC ’89 benchmark suite included 030.matrix300 (dense matrix multiplication). Since matrix multiplication is one of a set of core operations performed in many numerical applications, it was considered a good candidate for a benchmark. But, to quote Reinhold Weicker from the SPEC Newsletter (December 1995): “However, if a program becomes a benchmark, compiler authors can become very creative.”

In this case, compilers were modified to aggressively tile the loops; in each tile, the program performs a sub-matrix multiplication where the submatrices fit into the cache memory, improving the total performance by up to a factor of eight. (The term “loop tiling” or “iteration space tiling” was actually suggested by my wife in 1986; I was looking for a better term to use in a paper, she was looking at the kitchen floor.) Since this one optimization had such a big impact, and didn’t apply to the other benchmarks, the SPEC committee decided that it was not a fair contributor to an overall performance metric, and matrix300 was retired in 1992.

I noted last time that Dell had published a SPEC CPU2000 run in November 1999 on a 733 MHz Pentium III Precision Workstation 420, and another in October 2006 on a 2.66 GHz Core 2 Extreme Precision Workstation 390. I chose to compare these two runs simply because they were from the same vendor seven years apart. The base CFP2000 proved from 242 to 2679, a factor of just over 11. The big winner was 179.art, which improved from a ratio of 313 to 9306, almost a factor of 30 speedup. What accounts for this factor of 30? Can we expect similar improvements for any other program?

One way to achieve great speedups is to make the base case really slow; then, even simple optimizations can deliver a nice improvement. Sometimes, the program is written in a way that seems intentionally aimed at making it run slowly. Such a case appears in ART.

The ART benchmark (Adaptive Resonance Theory neural network for image ecognition) is written in C, and the critical loop is:

    struct{
double *I; double W, X, V, U, P, Q, R;
} * f1_layer;
double **bus;
....
for( tj = 0; tj < numf2s; tj++ ){
Y[tj].y = 0;
if( !Y[tj].reset )
for( ti = 0; ti < numf1s; ti++ )
Y[tj].y += f1_layer[ti].P * bus[ti][tj];
}

This loop appears in several places in the program, and much of the time of the program is spent in it; speed up this loop and the program runs fast.

However, there are several problems here. The struct f1_layer has 8 members, each 8 bytes long (assuming 64-bit pointers). That means each element of f1_layer takes up a whole 64-byte cache line. So while we’re traversing the array f1_layer in the inner loop, we only use one value out of each cache line. Even worse, the two-dimensional array bus is dynamically allocated, and we are traversing down the columns; that means two memory accesses (to get the row pointer bus[ti], then the value bus[ti][tj]). In both cases, the program abuses memory bandwidth in the inner loop, unless the whole dataset fits in the cache.

A few more comments: it turns out the inner loop has a trip count of about 10,000, while the outer loop has only 6 iterations, and the conditional around the inner loop never trips (reset is always 0), at least not in the benchmark datasets, so the inner loop is always executed. These facts are known only at runtime, however.

I’ve seen three ways to make this loop run much faster.  Some compilers implement what has been called the ART hack, reorganizing the data for the struct f1_layer. The array-of-struct is reorganized to become a struct of arrays. It takes the same amount of space, but now each element f1_layer[ti].P become f1_layer.P[ti], so consecutive elements are adjacent in the cache, and the performance of the cache and the whole program improves greatly.

    struct{
double **I; double *W, *X, *V, *U, *P, *Q, *R;
} f1_layer;
double **bus;
....
for( tj = 0; tj < numf2s; tj++ ){
Y[tj].y = 0;
if( !Y[tj].reset )
for( ti = 0; ti < numf1s; ti++ )
Y[tj].y += f1_layer.P[ti] * bus[ti][tj];
}

I did this by hand on an older Intel 3.4GHz EM64T Xeon, using the PGI compilers, and measured a 49% performance improvement. You can imagine what kind of whole program analysis would allow or disallow this reorganization, and it is very rarely feasible. However, this benchmark is so important that some compilers take this step. Here’s an optimization (to abuse the term) that would never have been invented if not for this particular benchmark.

A different trick is to interchange the two loops. The problem being solved is the accesses to the array bus, which are non-adjacent, have no locality, and require two loads per iteration, problems which go away if the two loops are interchanged. However, after interchanging, the new inner loop has a very short trip count (though the compiler probably doesn’t know that). The other more serious problem is that interchanging the loops brings the conditional inside both loops.

    struct{
double *I; double W, X, V, U, P, Q, R;
} * f1_layer;
double **bus;
....
for( tj = 0; tj < numf2s; tj++ )
Y[tj].y = 0;
for( ti = 0; ti < numf1s; ti++ ){
for( tj = 0; tj < numf2s; tj++ )
if( !Y[tj].reset )
Y[tj].y += f1_layer[ti].P * bus[ti][tj];
}

On the same Xeon, I measured a speedup of 2.33. However, this is quite dangerous, from a performance standpoint; instead of ‘numf2s’ conditional tests, there are now ‘numf1s*numf2s’ tests. If the test tripped at all, the modified version could execute quite a bit slower than the original. Yet, at least one compiler implements this and gets more than a factor of two improvement in the whole program, mostly due to this loop transformation.

The third trick, not implemented by any compiler (yet, that I know of), is to leave the loops the way they are and to transpose the array bus (and a similarly accessed array, tds). It turns out these arrays are dynamically allocated, but accessed in the wrong dimension. If we transpose the dimensions, the performance of this loop and the whole program really screams. On that same Xeon, I measured a speedup of 4.3.

This last is somewhat harder to implement automatically. The most severe problem is that C doesn’t really have two-dimensional arrays; to get a two-dimensional dynamic array, the program has to first allocate a one-dimensional vector of pointers. To transpose an array, the program has to allocate a vector of a different size. Purists argue that the modified program might allocate more space, and hence might run out of memory for some large datasets.

Moreover, the performance improvements are not very stable. The speedups I measured on the EM64T were 1.49 for array-of-struct reorganization, 2.3 for loop interchange, and 4.3 for for array transposition. Last month, I compared performance using an older 733MHz Intel Pentium III and a 2.66GHz Intel Core 2 Extreme. The speedups for these three optimizations on these two machines (and the EM64T) are summarized here:

       EM64T   PIII      Core2
        1.49       1.64      1.08    array-of-struct reorganization
        2.33       1.00      1.03    loop interchange
        4.34       1.19      1.48    array transpose

I am guessing that these optimizations have much less effect on the latest Core 2 because the data all fits in the much larger cache.

So, last month I discussed compiler tuning for 172.mgrid, where a new optimization improved its performance about 20%; happily, we’ve found this new feature applies in many other user applications as well. This month, I presented compiler tuning for 179.art, where aggressive optimization can improve the performance by factors (on some machines). I won’t go into the hacks, tricks, and other tuning for the other SPEC CPU2000 benchmarks; the number of compiler tricks is linearly related to the number of benchmarks.

With the increased importance of benchmark performance, compiler development teams are encouraged to aggressive (or even heroic) efforts to optimize performance on these programs. The only reason they do so is that vendors and users (and compiler product managers) place artificial importance on certain benchmark results. Yet, these optimizations, while impressive, may be of little value, or no value, or even negative value among the more general user domain, or even on the same program with different inputs. As shown here for ART, the value of the optimization may decrease to essentially zero as the architecture progresses.

Therefore, in the spirit of the Golden Raspberry award (http://www.razzies.com/) and the Ig Nobel Prizes (http://www.improbable.com/ig), I propose that we honor the most outrageous, benchmark-specific optimization with an award of its own, the Gloptimization award, or Gloppy for short. The award itself would be a pile of glop (or representation thereof), defined in my American Heritage Dictionary as “n. 1. A messy mixture, as of food. 2. Something, as writing, that is worthless. v. 1. To cover with glop. 2. To put glop on.” The award, at least, is appropriate. More credit should be given to an optimization that applies to a single benchmark; extra credit if it measureably slows down other benchmarks or applications. Posthumous awards can be proposed for optimizations that are actually removed from compilers as the targeted benchmarks are themselves retired. The optimizations mentioned above would certainly be candidates for a Gloppy, though perhaps not winners.

The lesson for customers is that standard benchmarks are valuable tools, but should not be the only or primary means of comparing system performance. The best measure is always the performance of your own applications, to which the systems and accompanying software are not specifically tuned.

SPEC (R) is a registered trademark of the Standard Performance Evaluation Corporation (http://www.spec.org/).

—–

Michael Wolfe has developed compilers for over 30 years in both academia and industry, and is now a senior compiler engineer at The Portland Group, Inc. (www.pgroup.com), a wholly-owned subsidiary of STMicroelectronics, Inc. The opinions stated here are those of the author, and do not represent opinions of The Portland Group, Inc. or STMicroelectronics, Inc.