Reliable Memory: Coming to a GPU Near You

By Michael Feldman

September 2, 2009

GPUs are becoming more like CPUs. But in the critical area of error corrected memory, graphics hardware still lags. The lack of error correction is probably the single biggest factor that makes users of GPUs for high performance computing nervous. Some HPC applications are resistant to the occasional bad data value, but many are not. The good news is that graphics chip vendors are aware of the problem and it appears to be only a matter of time before GPUs get a memory makeover.

Before AMD and NVIDIA brought GPU computing onto the scene, graphics processors didn’t really need to be concerned with error-prone memory. If a pixel’s color is off by a bit or two, nobody is going to notice as the images go flying by. So it was natural (and cheaper) for GPU devices to be built without support for error corrected memory. In 2006, with the advent of general-purpose computing on graphics processing units, otherwise know as GPGPU, the issue of reliable memory came to the fore.

The problem is that when you’re using the GPU as a math accelerator and a memory bit flips in a data value, you’ve got a potential problem. Obviously in numerical calculations, accuracy matters. That’s why all standard CPU servers today come with memory that supports Error Correcting Codes (ECC) as well as with on-chip intelligence for error checking and correction in cache and local data structures. The reason that general-purpose computing can be done on GPUs at all has to do with the relatively infrequent occurrence of these errors on standard graphics hardware. Algorithms are typically run many times in a typical technical computing application, so anomalous results can be averaged out, or even manually discarded.

The only simple way to circumvent the problem on the current crop of GPUs is to run the code twice (or simultaneously on two separate devices). If the results don’t match, you assume an error occurred and you rerun the offending sequence. It’s relatively bulletproof, but you’ve cut your price-performance in half for the sake of error correction. A less brute-force method was devised by the Tokyo Institute of Technology, who came up with software-based ECC for GPUs (PDF). But the preliminary results showed the performance overhead was acceptable only for compute-intensive applications, not bandwidth-intensive ones.

There are different categories of memory errors. The kind most people focus on are thought to be the result of cosmic rays, alpha particles in packaging material, or possibly as a side-effect of harsh environmental conditions. They are called soft (or transient) errors and most commonly occur in off-chip DRAM, but can also strike the GPU ASIC itself in local memory or data registers.

Hard (or permanent) errors can also be present on memory chips, but these are easy to detect with simple diagnostic tests. Hard errors are usually dealt with by replacing the offending memory module, but theoretically could be handled in software too. The conventional wisdom is that soft errors are much more common than hard errors, although at least one study (PDF) by Google found just the opposite.

Data errors can also occur at the memory bus interface. Here, at least, the graphics world has made some progress. GDDR5 (Graphics Double Data Rate, version 5) memory, which first appeared in 2008, was the first memory specification for graphics platforms that contained an error detection facility. The motivation behind this was the high data rates of GDDR5, which made the odds of producing bad data much more likely. Since GDDR5 contains an error correction protocol, a compatible memory controller is able to take corrective action — basically a retry — to compensate.

That still leaves a lot of data on the GPU board exposed. Adding ECC memory to GPU boards intended for the technical computing market is a relatively straightforward product decision since the extra cost can be passed on to the GPGPU consumer. But changing the GPU core as well as the integrated memory controller to complete the protection requires a tradeoff, since extra transistors are needed for error detection and correction on the ASIC. And because of the expense of designing and testing chips, GPUs are shared across product lines at AMD and NVIDIA.

For example, the latest AMD FireStream products use the Radeon HD 4800 core, while the current NVIDIA Tesla platforms uses (presumably) the GeForce GTX 285. These are the same ASICs used in high-end graphics products. The challenge to the two GPGPU vendors is to figure out how to design processors that offer the data reliability of a CPU server, without impacting their core graphics business unduly.

Patricia Harrell, AMD’s director of Stream Computing, admits that the need for more robust data protection in GPUs already exists. She says error corrected memory is a requirement for a number of customers, especially those looking to deploy GPUs at scale, i.e., high performance computing users with large compute clusters. Although individual memory error rates are low, as you add more GPUs (and thus more graphics memory) to the system, and run applications for longer periods of time, the chances of hitting a flipped memory bit increases proportionally.

The AMD FireStream 9270 board already incorporates GDDR5 memory, so data protection is already in place at the memory interface in this product. In this case, whenever the memory controller sends and receives data to and from the DRAM, it buffers the data locally while the DRAM calculates the integrity of the value and returns a status code. If the code indicates an error, the memory controller does the retry automatically.

Overall though, AMD seems to be taking a cautious approach to error correcting GPUs. “It’s really important to put in the required features intelligently, and make sure you do the research and engineering to protect the data structures that are going to return the most value,” notes Harrell. If not, she says, you end up with devices that are too big and too hot, in which case you lose the performance advantages GPGPU was originally intended for.

Harrell says that they are continuing to look at the memory protection issue, but couldn’t offer more specific guidance on AMD’s roadmap. “I think it isn’t clear if that [error correction] is going to be required for the broad market yet,” she adds.

Unlike AMD’s more wait-and-see attitude, NVIDIA appears to be fully committed to bringing error protection to GPU computing. According to Andy Keane, general manager of the GPU computing business unit at NVIDIA, it is not a matter of if, but when. From his point of view, ECC memory is a hard requirement in datacenters. “We have to respond to that by building that kind of support into our roadmap,” Keane said unequivocally. “It will be in a future GPU.”

As far as when ECC-capable Tesla products will show up, Keane wouldn’t say. It’s likely that NVIDIA’s OEM partners and GPU computing developers already have a pretty good idea of the timeline (under NDA of course), so systems and software based on high-integrity GPUs may already be in the works. In a Real World Technologies article that spells out the major costs and benefits of error corrected memory in GPUs, analyst David Kanter predicts that NVIDIA’s next GPGPU product release will include ECC.

Presumably Intel is also mulling over its options, since Larrabee, the company’s first high-end graphics processor, is scheduled to be released into the wild next year. But Intel insists the first version of Larrabee will target the traditional graphics space, making it unlikely that they would introduce ECC into the mix. Of course, the company could reverse itself and release a true HPC processor variant with ECC bells and whistles.

My sense is that ECC will come to GPU computing products sooner (1-2 years) rather that later (3-5 years). Being able to ensure data integrity in these devices will widen the aperture for HPC applications and help push GPGPU into true supercomputers. Just like double precision performance and on-board memory capacity, error correction is destined to become an important differentiator in high-end GPU computing.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion XL — were added to the benchmark suite as MLPerf continues Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing power it brings to artificial intelligence.  Nvidia's DGX Read more…

Call for Participation in Workshop on Potential NSF CISE Quantum Initiative

March 26, 2024

Editor’s Note: Next month there will be a workshop to discuss what a quantum initiative led by NSF’s Computer, Information Science and Engineering (CISE) directorate could entail. The details are posted below in a Ca Read more…

Waseda U. Researchers Reports New Quantum Algorithm for Speeding Optimization

March 25, 2024

Optimization problems cover a wide range of applications and are often cited as good candidates for quantum computing. However, the execution time for constrained combinatorial optimization applications on quantum device Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at the network layer threatens to make bigger and brawnier pro Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HBM3E memory as well as the the ability to train 1 trillion pa Read more…

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HB Read more…

Nvidia Looks to Accelerate GenAI Adoption with NIM

March 19, 2024

Today at the GPU Technology Conference, Nvidia launched a new offering aimed at helping customers quickly deploy their generative AI applications in a secure, s Read more…

The Generative AI Future Is Now, Nvidia’s Huang Says

March 19, 2024

We are in the early days of a transformative shift in how business gets done thanks to the advent of generative AI, according to Nvidia CEO and cofounder Jensen Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Nvidia Showcases Quantum Cloud, Expanding Quantum Portfolio at GTC24

March 18, 2024

Nvidia’s barrage of quantum news at GTC24 this week includes new products, signature collaborations, and a new Nvidia Quantum Cloud for quantum developers. Wh Read more…

Alibaba Shuts Down its Quantum Computing Effort

November 30, 2023

In case you missed it, China’s e-commerce giant Alibaba has shut down its quantum computing research effort. It’s not entirely clear what drove the change. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

DoD Takes a Long View of Quantum Computing

December 19, 2023

Given the large sums tied to expensive weapon systems – think $100-million-plus per F-35 fighter – it’s easy to forget the U.S. Department of Defense is a Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Leading Solution Providers

Contributors

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

Google Introduces ‘Hypercomputer’ to Its AI Infrastructure

December 11, 2023

Google ran out of monikers to describe its new AI system released on December 7. Supercomputer perhaps wasn't an apt description, so it settled on Hypercomputer Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Intel Won’t Have a Xeon Max Chip with New Emerald Rapids CPU

December 14, 2023

As expected, Intel officially announced its 5th generation Xeon server chips codenamed Emerald Rapids at an event in New York City, where the focus was really o Read more…

IBM Quantum Summit: Two New QPUs, Upgraded Qiskit, 10-year Roadmap and More

December 4, 2023

IBM kicks off its annual Quantum Summit today and will announce a broad range of advances including its much-anticipated 1121-qubit Condor QPU, a smaller 133-qu Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire