With all the recent hoopla about GPGPU acceleration in high performance computing, it’s easy to forget that Roadrunner, the most powerful supercomputer in the world, is based on a different brand of accelerator. The machine at Los Alamos National Laboratory uses 12,960 IBM PowerXCell 8i CPUs hooked up to 6,480 AMD Opteron dual-core processors to deliver 1.1 petaflop performance on Linpack.
Because of the wide disparity in floating point performance between the PowerXCell 8i processor and the Opteron, the vast majority of Roadrunner’s floating point capability resides with the Cell processors. Each PowerXCell 8i delivers over 100 double precision gigaflops per chip, which means the Opteron only contributes about 3 percent of the FLOPS of the hybrid supercomputer.
Some of those FLOPS are already being put to good use, though. This week, Los Alamos announced that the lab had completed its “shakedown” phase for Roadrunner. Because the machine was installed in May 2008, this has allowed researchers over a year to experiment with some big science applications.
These unclassified science codes included a simulation of the expanding universe, a phylogenic exploration of the evolution of the Human Immunodeficiency Virus (HIV), a simulation of laser plasma interactions for nuclear fusion, an atomic-level model of nanowires, a model of “magnetic reconnection,” and a molecular dynamics simulation of how materials behave under extreme stress. All of these codes were able to make good use of the petascale performance of the Roadrunner.
Now that the shakedown period has concluded, the NNSA will move in to claim those FLOPS for nuclear weapons simulations. Since these applications are obviously of a classified nature, we’re not likely to hear much about their specific outcomes. Open science codes will still get a crack at the machine, but since Roadrunner’s primary mission is to support US nuclear deterrence, the unclassified workloads will presumably get pushed to the back of the line.
The bigger question is what are the longer-term prospects of a hybrid x86-Cell system architecture and the Cell processor, in general, for the high performance computing realm? Unlike GPUs or FPGAs, Cell processors contain their own CPU core (a PowerPC) along with eight SIMD coprocessing units, called Synergistic Processing Elements (SPE), so the chip represents a more fully functional architecture than its competition. Despite that advantage, the Cell’s penetration into general-purpose computing has remained somewhat limited. Although the original Cell processor was the basis for the PlayStation3 gaming console and the double-precision-enhanced PowerXCell variant has found a home in HPC blades, neither version is a commodity chip in the same sense as the x86 CPU or general-purpose GPUs. The result is that Cell-based solutions are strewn rather haphazardly across the HPC landscape.
Besides the high-profile Roadrunner system, IBM also offers a standalone QS22 Cell blade, which is deployed at a handful of sites, including the Interdisciplinary Centre for Mathematical and Computational Modeling at the University of Warsaw and Repsol YPF, a Spanish oil and gas company. As it turns out, these systems are among the most energy efficient, with the Warsaw system currently sitting atop the Green500 list. Other Cell accelerator boards are available from Mercury Computer Systems, Fixstars, and Sony, but I’ve yet to hear of any notable HPC deployments resulting from these products.
Cell processor developer tools certainly exist, but no standard environment has come to the fore. This is rather important since the heterogeneous nature of the Cell architecture means programming is inherently more difficult. IBM, of course, provides its own software development kit for the architecture. Outside of Big Blue, Mercury Computer Systems has a Cell-friendly Multicore Plus SDK, and software vendor Gedae sells a compiler. RapidMind offers Cell support in its multicore development platform, but since the company was acquired by Intel, its Cell-loving days are likely coming to a close. French software maker CAPS was planning to offer Cell support in its HMPP manycore development suite sometime this year, but that hasn’t come to pass.
With NVIDIA’s Fermi GPU architecture poised to make a big entrance into high performance computing in 2010, IBM will have to make a decision about adding GPU acceleration to its existing HPC server lineup. Server rival HP has apparently already committed to including Fermi hardware in its offerings. Last week Georgia Tech announced HP and NVIDIA would be delivering a sub-petaflop supercomputer to the institute in early 2010. That system will be based on Intel Xeon servers accelerated by Fermi processors. Other HPC vendors, including Cray, have announced plans to bring Fermi into their product lines. If GPUs become the mainstream accelerator for HPC servers, IBM will be forced to follow suit.
That’s not to say IBM will give up on its home-grown Cell chip. Big Blue has a tradition of offering a smorgasbord of architectures to its customers, especially in the HPC market. Today the company has high-end server products based on x86 CPUs, Blue Gene (PowerPC-based) SoCs, Power CPUs, and the Cell processor. Adding GPU-accelerated hardware wouldn’t necessarily mean ditching the Cell.
On the other hand, IBM has to consider if it wants to reinvest in the architecture to keep up with the latest GPU performance numbers from NVIDIA and AMD, which would mean getting a single Cell processor to deliver hundreds of gigaflops of double-precision performance. IBM is certainly capable of building such a chip, but there’s little motivation to do so. With no established base of customers clamoring for Cell-equipped supercomputers and with a relatively small volume of Cell chips from which to leverage high-end parts, it’s hard to imagine that Big Blue will be doubling down on its Cell bet.