September 16, 2010

Intel, AMD Gear Up for 2011 Server Chip Battle

by Michael Feldman

Although 2010 still has a few months left to go, the competition in the x86 server processor arena for 2011 is already setting up to be a knock-down, drag-out fight. Both AMD and Intel are introducing new high-end server chips with revamped microarchitectures next year, and, at the same time, upping the core counts over their previous generation products. At a time when AMD is looking to make up lost market share, Intel is hoping to expand its dominance in the x86 server market.

This week at the Intel Developer Forum (IDF) extravaganza in San Francisco, Intel had the opportunity to provide some more tidbits about its next generation “Sandy Bridge” server processors, but chose to concentrate mostly on the client-side products and applications. This was a practical choice, given that the chipmaker is planning to launch two of its most interesting products later this year: the new “Tunnel Creek,” Atom E600 SoC processors for embedded apps and the first “Sandy Bridge” processors with integrated graphics for PCs.

Sandy Bridge, which represents the 32nm-based microarchitecture upgrade from Nehalem, will end up in Xeon server parts as well, but these chips are not expected to ship until well into 2011. They’ll be meeting AMD’s 32nm “Interlagos” Opteron CPUs in roughly the same timeframe.

The first Sandy Bridge chips, which Intel talked up at IDF, are destined for desktop and laptop platforms and will sport two or four cores along with an integrated graphics engine. The new design will include a new high bandwidth, low latency “ring” interconnect that enables the integrated graphics unit to share cache with the CPU cores. In general, Intel’s CPU-GPU design mimics AMD’s Fusion processor architecture, also initially targeted to the PC market.

The idea is to bring at least low-end and mid-range graphics support on-chip, eliminating the need for an external GPU on the motherboard. The integrated graphics is being aimed at a rapidly growing set of applications for client platforms, including HD video, 3D visualization, mainstream gaming, multi-tasking and online socializing and multimedia.

However, despite the growing popularity of GPU computing for technical computing, the next generation of Xeons and Opterons for servers are not going to have integrated graphics. Instead, the extra silicon real estate will be used for CPU cores. In the case of Sandy Bridge Xeons, expect to see up to 8 cores per chip, at least for the dual-socket version. AMD’s Interlagos Opteron, meanwhile, will come in 12-core and 16-core flavors.

At IDF, Intel demonstrated a next-generation 8-core Xeon processor (presumably the Sandy Bridge EP, or equivalent) in a two-socket server, referring to it as the “Romley” platform. According to Intel, this was the first public showing for this platform since it booted up last month. Intel went on to say that those chips were on schedule for production in the second half of 2011.

The particular application being demonstrated on Romley was decrypting and encrypting three video conference streams simultaneously. Since they had HyperThreading enabled, the app had 32 threads to play with, which Intel chief Paul Otellini remarked was “pretty amazing” for a two-socket server.

Keep in mind that AMD’s upcoming Interlagos chip will also support 32 threads in a two-socket box, but won’t need anything like HyperThreading to pull it off. Interlagos is based on AMD’s new Bulldozer core architecture, which doubles up on integer units inside a module. Interlagos has 8 Bulldozer modules, thus 16 cores per chip and 32 per 2P server.

AMD’s John Fruehe noted that even though the company was moving up to Bulldozer, the Interlagos processors have the same thermal envelope and snap into the same socket (G34) as the previous generation Magny-Cours chip, providing an easy upgrade path for Opteron customers. (Sandy Bridge Xeons will almost certainly require a socket change.) AMD will be sampling Interlagos with their partners before the end of this year and launching it in 2011.

Not surprisingly, Fruehe believes his company has the edge in next year’s CPU server battle, mainly because the Opterons will out-core the Xeons in a head-to-head match-up. That’s true even today, where the 12-core Magny-Cours chip is dueling with the 6-core Westmere EP and 8-core Nehalem EX.

In AMD’s own testing for Linpack performance, a two-socket Magny-Cours server easily outruns a two-socket Nehalem box. And although that benchmark matches up a previous generation quad-core Nehalem with a current generation 12-core Opteron, Fruehe said Magny-Cours would outperform the newer 6-core Westmere processors as well.

In fact, for a company that seemed rather unenthusiastic about multiplying cores just a few years ago, AMD can’t seem to get enough of them now. And that seems to reflect customer demand too. According to Fruehe, customers, and especially HPC customers, are selecting systems with the 12-core version of Magny-Cours over the 8-core variant.

The company was anticipating more users would opt for higher clock speeds and a better ratio of cores to memory/cache bandwidth, so would naturally gravitate toward the 8-core version. As it turns, a fair number of mainstream business customer did just that. But in HPC and elsewhere, there is a heavy preference for additional cores over clock speed.

“That bodes well for us as we get into 2011 because core counts go up again, from the 8 and 12 we have today to 12 and 16,” said Fruehe. “It really feels like customers are dying for more cores, so that puts us in a real good position as we bring out the Bulldozer products.”

That said, the core advantage for AMD’s top-of-the-line server chips might not result in better floating point performance compared to their Intel counterparts. Both Sandy Bridge and Bulldozer are supporting expanded 256-bit floating point operations, accessible through new AVX (advanced vector extensions) instructions. The wider vector will allow for up to two times the peak FLOPS throughput. But since each two-core Bulldozer module shares a single 256-bit floating point unit (as an aggregation of two 128-bit units), the Opterons will need twice as many cores to keep up the Xeons when the application is using these extra-wide FP operations.

Since none of these processors, not even the client versions, have been released into the wild yet, no specific performance data is available. AMD is promising a 50 percent better performance on Interlagos compared to Magny-Cours. But that refers to absolute peak throughput; your application mileage will almost certainly vary. Intel has been mum on any performance numbers for Sandy Bridge, other than stating the obvious FP throughput boost for the 256-bit AVX instructions. In any case, 2011 will be here soon enough and we’ll let the benchmarkers have at it.