February 28, 2011

Growing Data Deluge Prompts Processor Redesign

Tiffany Trader

The current generation of microprocessors are ill-equipped to meet growing demands of data processing. Stated another way, the amount of data that needs to be processed is quickly outpacing the performance of chips. With the current processor-centric design, the data is shuttled back and forth from processor to memory, a time-consuming activity. Additionally, all that back-and-forth movement requires a lot of electrity, far more than is consumed by the actual processing. Employing the current processor design in future exascale supercomputers (machines that will require about a billion cores) will create an impossible energy demand.

If computing progress is to continue its foward march and if the next big goal of exaflop-scale machines is to be achieved, it will require a revamping of the current processor architecture. And thanks to advancements in the field of nanoelectronics, the time for such a redesign may finally be at hand. New York Times author John Markoff explores the issue in a recent article.

Writes Markoff:

The semiconductor industry has long warned about a set of impending bottlenecks described as “the wall,” a point in time where more than five decades of progress in continuously shrinking the size of transistors used in computation will end. If progress stops it will not only slow the rate of consumer electronics innovation, but also end the exponential increase in the speed of the world’s most powerful supercomputers — 1,000 times faster each decade.

Researchers from industry and academia alike have begun to address the challenge, as Markoff notes. Hewlett-Packard researchers are designing stacked chip systems that bring the memory and processor much closer together, reducing the distance the data must travel and in doing so greatly reducing energy demands.

Parthasarathy Ranganathan, a Hewlett-Packard electrical engineer, explains that the “systems will be based on memory chips he calls ‘nanostores’ as distinct from today’s microprocessors. They will be hybrids, three-dimensional systems in which lower-level circuits will be based on a nanoelectronic technology called the memristor, which Hewlett-Packard is developing to store data. The nanostore chips will have a multistory design, and computing circuits made with conventional silicon will sit directly on top of the memory to process the data, with minimal energy costs.”

The science of nanoelectrics has generated other promising technologies designed to make the energy demands of future systems more manageable. Researchers at Harvard and Mitre Corporation have developed nanoprocessor “tiles” based on electronic switches made from ultrathin germanium-silicon wires.

I.B.M. and Samsung have partnered on phase-change memories, in which an electric current is used to switch a material from a crystalline to an amorphous state and back again. I.B.M. researchers are also looking at carbon nanotube technology to create hybrid systems that draw on advancements in both nanoelectronics and microelectronics.

Full story at The New York Times