3D Torus Topology with InfiniBand at San Diego Supercomputing Center

By Nicole Hemsoth

January 30, 2012

The San Diego Supercomputing Center Gordon Supercomputer was built in response to a call from the National Science Foundation (NSF) to deploy a “data intensive” computer.     With this in mind, Gordon was designed for running data-intensive applications spanning domains such as genomics, graph problems, geophysics, and data mining. Scientific researches will include the analysis of individual genomes to tailor drugs to specific patients, the development of more accurate models to predict the impact of earthquakes on buildings and other structures, and simulations that offer greater insight into what’s happening to the planet’s climate.

CAPABILITIES OF THE GORDON SUPERCOMPUTER

The SDSC Gordon cluster is composed of over 1,000 compute nodes based on the Intel Xeon processor E5 family.   The supercomputer also employs a number of unique capabilities to provide the data-intensive applications it was built to run.   One of these features is very fast access to storage via 64 I/O nodes incorporating 300TB of high performance SSD flash-based memory connected over the InfiniBand fabric.  This flash memory will help speed access to storage that is traditionally limited by the slower spinning disk-based storage.      One benefit of this fast storage is to enable the manipulation of massive graphs that arise in many data-intensive fields, including bioinformatics, social networks and neuroscience. In these applications, large databases could be loaded into flash memory and queried with much lower latency than if they were resident on disk.

Each of these I/O nodes is capable of more than 560K IOPS, or 35M IOPS for the full system, making it what SDSC believes is the fastest supercomputer ever commissioned by the NSF in terms of I/O operations.   For comparison purposes, the flash storage is large enough to store the entire 100,000 Netflix movie catalog (and still have room to spare), and is fast enough to deliver more than 200 Netflix movies in a single second.  

Another concept unique to the Gordon cluster is the ‘Supernode’ architecture.    Each Gordon supernode consists of 32 HPC compute nodes and is capable of 240 GFLOPS/node and 64 GBof RAM per node.   Each supernode also incorporates 2 of the high speed I/O nodes detailed above.   When tied together by virtual shared memory, each of the system’s 32 supernodes has the potential of 7.7 TFLOP of compute power and 10 TB of memory.    An additional benefit of the cluster is the use of the supernodes are completely programmable, so the nodes can be allocated either as traditional HPC nodes, as supernodes, or as combinations of the two.  

A 3D TORUS TOPOLOGY

SDSC chose to deploy a 3D Torus topology for the Gordon fabric.   There are considerations to take into account when selecting between a 3D Torus and alternate topologies, but in some clusters there are key characteristics of a 3D Torus that make it a good choice.     When comparing the 3D Torus to other topologies, the most often considered alternative is a fat-tree topology, which is the most commonly used topology for InfiniBand fabrics today.    With a fat-tree topology, every node has equal access bandwidth to every other node in the cluster.   Fat-tree is a great topology for running large scale applications where nodes do a lot of communication with each other, e.g., large MPI jobs.   In contrast, a 3D Torus topology is best used for applications that use communications between localized compute nodes, as this locality is usually a requirement to achieve optimal performance with a torus.   Given the data intensive applications that are targeted for Gordon, and the nature of these applications where in many cases localization constraints within the application are employed, the 3D Torus architecture made sense from a performance perspective.  

There are additional advantages to be gained by using a 3D Torus topology that make it appealing for certain installations.   In general the cabling of the cluster can be simpler, and also shorter cables can be utilized to build the cluster.   This provides for a cost effective, power efficient and resilient design.    Also, if future expansion is a requirement, the 3D Torus can be added to with very little re-cabling necessary.   The ends of the torus are simply disconnected, servers are added, and then the torus is reconnected at the end points.

3D TORUS IMPLEMENTATION

To build their 3D Torus network, SDSC relied on InfiniBand hardware and software from Mellanox Technologies.    The 3D Torus was built using 36-port switch nodes in a 4x4x4 configuration, for a total of 64 torus junctions.   Each of these junctions connects to 16 compute nodes, and 2 IO nodes, with inter-node links using 3 switch ports in each of the +/- X, Y, and Z directions.   Utilizing 40Gb/s QDR technology, this delivers over 12 GB/s of bandwidth in each direction.    The cluster also employs a dual-rail technology, meaning two independent HCAs are populate in each server, and each HCA is connected to a separate 4x4x4 torus network.   This provides the applications double the throughput from a server, or over 7 GB/s injection rate into the network.  

 

 

Fig. 1   4x4x4 3D-Torus Logical Deployment Diagram

Mellanox used a unique algorithm called ‘Torus-2QOS’ to provide the packet routing configuration through the switching fabric.    This algorithm, originally developed at Sandia National Laboratories, is based on Direct Ordered Routing (DOR) routing principles, but has the unique capability of being able to handle the loop wiring nature of a torus, and to also provide a level of Quality of Service (QOS) within the torus.   QOS in important as it allows different traffic types, or service levels,  their own dedicated network resources that won’t interfere with traffic from other service levels.   This is especially useful in a cluster like Gordon, as the storage traffic from the IO nodes can run on their own service level from the compute traffic, giving each of these traffic types their own set of resources within the network where they won’t interfere with each other.    

The Torus-2QOS algorithm that was deployed also has many advanced features, including its level of resiliency.   The routing is setup in such a way that it can ‘self-heal’ and reroute around multiple cable failures as well as a complete switch failure.   This rerouting is done automatically by the subnet management entity that is managing the fabric, and is done independently and without the knowledge of the applications running over the fabric.  

While the details and interworking’s of the 3D Torus algorithm are beyond the scope of this article, from a simple conceptual view, separate ‘virtual fabric’ are employed in the switching network and used by the applications to avoid the credit loops discussed above.   For example, a dateline is drawn in each plane of the torus, and if the packets cross this dateline they run over a different ‘virtual fabric’ from packets that do not cross the dateline.    In this way, no loops are can be formed across the torus.  Applications need to be aware of the correct ‘virtual fabrics’ to use when communicating to another server.   Because InfiniBand uses a centralized management scheme, it is a rather straightforward process for the application to be given the ‘virtual fabric’ information from this centralized manager whenever setting up a connection to another server.    Since most applications use this mechanism anyways, no changes to the application were necessary to be able to use the 3D Torus.  

THE FUTURE OF 3D TORUS WITH INFINIBAND

The software that Mellanox deployed on the cluster is now industry standard and part of the open source community Open Fabric stack.   This includes the subnet management routing algorithms, the management tools, and the application support to run over a 3D Torus topology.   The San Diego Supercomputing Gordon cluster shows that it is feasible and practical to run a 3D Torus topology with InfiniBand.   It also shows the power and flexibility of InfiniBand to be able to run different topologies depending on the performance goals, architecture and cost targets of the supercomputer. 

http://www.mellanox.com

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion XL — were added to the benchmark suite as MLPerf continues Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing power it brings to artificial intelligence.  Nvidia's DGX Read more…

Call for Participation in Workshop on Potential NSF CISE Quantum Initiative

March 26, 2024

Editor’s Note: Next month there will be a workshop to discuss what a quantum initiative led by NSF’s Computer, Information Science and Engineering (CISE) directorate could entail. The details are posted below in a Ca Read more…

Waseda U. Researchers Reports New Quantum Algorithm for Speeding Optimization

March 25, 2024

Optimization problems cover a wide range of applications and are often cited as good candidates for quantum computing. However, the execution time for constrained combinatorial optimization applications on quantum device Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at the network layer threatens to make bigger and brawnier pro Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HBM3E memory as well as the the ability to train 1 trillion pa Read more…

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HB Read more…

Nvidia Looks to Accelerate GenAI Adoption with NIM

March 19, 2024

Today at the GPU Technology Conference, Nvidia launched a new offering aimed at helping customers quickly deploy their generative AI applications in a secure, s Read more…

The Generative AI Future Is Now, Nvidia’s Huang Says

March 19, 2024

We are in the early days of a transformative shift in how business gets done thanks to the advent of generative AI, according to Nvidia CEO and cofounder Jensen Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Nvidia Showcases Quantum Cloud, Expanding Quantum Portfolio at GTC24

March 18, 2024

Nvidia’s barrage of quantum news at GTC24 this week includes new products, signature collaborations, and a new Nvidia Quantum Cloud for quantum developers. Wh Read more…

Alibaba Shuts Down its Quantum Computing Effort

November 30, 2023

In case you missed it, China’s e-commerce giant Alibaba has shut down its quantum computing research effort. It’s not entirely clear what drove the change. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

DoD Takes a Long View of Quantum Computing

December 19, 2023

Given the large sums tied to expensive weapon systems – think $100-million-plus per F-35 fighter – it’s easy to forget the U.S. Department of Defense is a Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Leading Solution Providers

Contributors

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

Google Introduces ‘Hypercomputer’ to Its AI Infrastructure

December 11, 2023

Google ran out of monikers to describe its new AI system released on December 7. Supercomputer perhaps wasn't an apt description, so it settled on Hypercomputer Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Intel Won’t Have a Xeon Max Chip with New Emerald Rapids CPU

December 14, 2023

As expected, Intel officially announced its 5th generation Xeon server chips codenamed Emerald Rapids at an event in New York City, where the focus was really o Read more…

IBM Quantum Summit: Two New QPUs, Upgraded Qiskit, 10-year Roadmap and More

December 4, 2023

IBM kicks off its annual Quantum Summit today and will announce a broad range of advances including its much-anticipated 1121-qubit Condor QPU, a smaller 133-qu Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire