From Mobile Phones to Supercomputers
While almost every system on the TOP500 list makes use of multicore CPUs, one supercomputing research team looks to buck that trend. Next month, the Barcelona Supercomputing Center (BSC) will begin building the second prototype of their Mont-Blanc supercomputer using NVIDIA’s Tegra 3 processors, the same chips found on mobile devices. In a Wired article published this week, Mont-Blanc project-lead Alex Ramirez talks about the work and what to expect from the from the new prototype system.
Originally announced last November, the Mont-Blanc project creates a new architectural paradigm for HPC by focusing on increasing the compute performance of low-power mobile processors as opposed to reducing the power consumption of traditional multicore server CPUs. The team at BSC saw Tegra as a way to start building such systems and developing software for them.
Tegra represents NVIDIA’s first cut at heterogeneous computing, encapsulating ARM CPU cores alongside a GPU. While intended for smartphones and tablets, Ramirez and his team believe processors like Tegra will be needed to make future supercomputers fit into a reasonable power budget.
Exascale supercomputers, for example, are expected to consume no more than 20 MW of power, but to reach that goal by the end of the decade will require something beyond a Moore’s Law-based progression of today’s server CPUs. Currently, a server-grade Intel Xeon chip consumes between 50 to more than 100 watts of power. A Tegra 3, on the other hand, requires just 4 watts. The Xeon is many times more powerful than the Tegra, but on a performance per watt basis, the NVIDIA chip screams.
To drive home that point, the new Mont-Blanc prototype will have a shot at unseating Blue Gene/Q as the most energy efficient supercomputer in the world come this June. On the latest Green500 list, the top-ranked Q system delivers about 2 gigaflops/watt. But according to Ramirez, the new prototype should hit around 7 gigaflops/watt.
Although the prototype will be very impressive with regard to energy efficiency, it must contend with a hurdle that does not affect other HPC systems. Supercomputing applications are not geared for a mobile processor’s architecture, which will require some serious rewriting of source code to accommodate the Tegra design. NVIDIA has recently released an SDK for the chip, which is intended to help alleviate the programming issue.
Looking beyond the Green500, Ramirez expects to land on June’s TOP500 list with a system utilizing 2,000 to 4,000 cores and hopes to lead the supercomputing pack with a much larger 200 petaflop system by 2017.
Although the move to build a supercomputer utilizing mobile processors is unorthodox, it adheres to the current conventional wisdom in HPC that low-power heterogeneous processors will be required for exascale computing. If Ramirez’ team can answer the programming challenge, the BSC project may become a model for future supercomputers.
Full story at Wired