NVIDIA Launches Kepler Into HPC

By Michael Feldman

May 15, 2012

NVIDIA has introduced its first Kepler-generation GPU product for high performance computing, and revealed some of the inner working of the new architecture. The announcement took place at the kickoff of the company’s GPU Technology Conference (GTC) taking place this week in San Jose, California.

Kepler’s HPC debut comes at time when NVIDIA has established itself as the go-to chip vendor for heterogeneous supercomputing. With Intel’s MIC product launch several months away and AMD still primarily focused on the consumer space with its CPU-GPU Fusion processors, NVIDIA has enjoyed free reign in the HPC acceleration business.

And it appears to be turning into quite a business. IDC is reporting that 75 percent of total HPC customer will use GPUs by 2014. And according to Sumit Gupta, NVIDIA’s senior director of the Tesla GPU Computing business unit, by the end of this year, 50 to 60 percent of the top apps at the big supercomputing labs around the world will be accelerated by GPUs. That level of interest is also reflected in CUDA toolkit downloads, which Gupta reports is occurring at the rate of one every 60 seconds. “We’re seeing a true liftoff in the number of application accelerated by GPUs,” he says.

In 2010, NVIDIA changed the game in HPC with the Fermi chips, introducing error corrected memory and some serious double precision floating point performance — 665 gigaflops, to be precise. Gupta believes the feature set they’re bringing to the table with the Kepler architecture will provide the basis for same sort of technological discontinuity.

One of the more interesting pieces of the Kepler HPC technology is the so-called “Hyper-Q” capability. Essentially it allows the GPU to work on as many as 32 CPU-driven MPI tasks simultaneously. With Fermi, the GPU was only able to run a single MPI task at a time (although multiple tasks could be on-chip, waiting to be switched to). So if a task only happens to use a quarter of the cores, the remain three quarters of the GPU was idle. Now with up 32 tasks running concurrently, both the CPU host and the GPU accelerator should be better utilized, with less idle time all around.

Another notable Kepler enhancement is something the Nvidians call “dynamic parallelism.” This allows the GPU to do a lot more processing independently of the CPU. The traditional model was for the CPU to send the GPU some work via a CUDA call; when it was done, the GPU would have to wait for more work from the host.

With dynamic parallelism, that kind of ping-pong processing can be greatly reduced. CUDA functions that previously would have been launched from the CPU, can now be called from the CUDA code itself on the GPU. Performance should be better since communication overhead between the two chips will be reduced. In essence, more of the application will end up on the GPU, allowing the CPU to free to do its own thing.

Perhaps more importantly, notes Gupta, is that this capability will allow developers to write applications for the GPU much more naturally, since much of the CPU-to-GPU calls can be done away with. And it will allow more complex and irregular types of applications (like adaptive mesh codes) to be ported more easily to the GPU. “This is a ground-breaking change,” says Gupta.

But the fundamental upgrade to Kepler is its increased core count. To make that happen, the engineers did a complete redesign of the GPU’s streaming multiprocessor (SM), the internal structure that provides thread processing. In Fermi, each SM contained 32 cores; while in Kepler, that’s been bumped way up to 192.

Part of that was possible thanks to the smaller 28nm process technology for the Kepler silicon, but the engineers also freed up additional die real estate by compressing the control logic on the multiprocessor. The result is that each Kepler SM — now referred to as SM extreme, or SMX — has six times as many cores as its predecessor.

To go along with the extra parallelism, the NVIDIA engineers reduced the clock frequency those cores are running at by about half. In doing so, they were able to realize about three times the performance per watt of the Fermi GPU. If you’re keeping score at home, that means a Kepler GPU that draws the same 225 watt TDP as the latest Fermi Tesla part should deliver just shy of 2 teraflops of double precision.

That product, however, will not be NVIDIA’s first Kepler Tesla that it announced today at the GTC event. Known as the K10, this initial HPC Kepler offering will house two consumer-grade GK104 GPUs, the same chip used in the Kepler GeForce products that were introduced in March.

As such it lacks the nifty high-end Hyper-Q and dynamic parallelism features mentioned above. Plus it’s rather underpowered in the double precision (DP) floating point department, managing only 190 gigaflops — less than a third that of the Fermi Tesla M2090.

Where the K10 shines is in single precision (SP), delivering 4.48 teraflops across the two GPUs, which is three and a half times the SP floppery of the Fermi M2090 hardware. This makes it especially suitable for applications like image/signal processing, seismic codes, and maybe some mixed precision algorithms in academia. According to NVIDIA, initial testing with LAMMPS, NAMD, seismic processing, and certain integer-centric defense codes showed performance increases between 1.5X and 2.0X compared to the Fermi M2090. Petrobras, the Brazilian oil and gas company, reported a 1.8X speedup on its seismic application with the K10.

The new card is also plenty fast at data transfer speeds, sporting 320 GB/sec of memory bandwidth and a host connection of 16 GB/sec, courtesy of PCIe Gen 3. Memory capacity is a respectable 8 GB, which is shared between the two GPUs on the card.

The K10 is shipping this month and will be initially available in products from IBM, HP, Dell, SGI, Appro, and Supermicro.

Further down the road is the K20, which will represent NVIDIA’s first true Kepler-generation supercomputing Tesla. The K20 will be based on the GK110 GPU, which is the one built for HPC duty. It will fold in the Hyper-Q and dynamic parallelism technology, and will be fully outfitted for double precision. For the time being, NVIDIA is keeping mum on the peak performance, but this is the chip that could be flirting with 2 DP teraflops. In any case, we’ll have to wait until later in the year to get the actual specs.

The K20 will be the Tesla deployed in “Titan” supercomputer at Oak Ridge National Lab, and in the NCSA’s “Blue Waters” system at the University of Illinois. Some of new chips could be installed in these top supers as early as the fall, but volume production of the K20 is slated for Q4.

Although the multi-petaflop systems mentioned above will get first crack at the K20, this is the product NVIDIA is hoping universities and mid-sized installations start adopting to build their own petaflop supers. Gupta says Kepler-equipped supers of this size will be able to fit into 10 server racks and draw a relatively modest 400 KW of power, well within the reach of a modest-sized organization. If Kepler indeed becomes the enabling technology of petascale supercomputing for the masses, NVIDIA will have delivered another GPU that, once again, changed the game in HPC.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing power it brings to artificial intelligence.  Nvidia's DGX Read more…

Call for Participation in Workshop on Potential NSF CISE Quantum Initiative

March 26, 2024

Editor’s Note: Next month there will be a workshop to discuss what a quantum initiative led by NSF’s Computer, Information Science and Engineering (CISE) directorate could entail. The details are posted below in a Ca Read more…

Waseda U. Researchers Reports New Quantum Algorithm for Speeding Optimization

March 25, 2024

Optimization problems cover a wide range of applications and are often cited as good candidates for quantum computing. However, the execution time for constrained combinatorial optimization applications on quantum device Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at the network layer threatens to make bigger and brawnier pro Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HBM3E memory as well as the the ability to train 1 trillion pa Read more…

Nvidia Appoints Andy Grant as EMEA Director of Supercomputing, Higher Education, and AI

March 22, 2024

Nvidia recently appointed Andy Grant as Director, Supercomputing, Higher Education, and AI for Europe, the Middle East, and Africa (EMEA). With over 25 years of high-performance computing (HPC) experience, Grant brings a Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HB Read more…

Nvidia Looks to Accelerate GenAI Adoption with NIM

March 19, 2024

Today at the GPU Technology Conference, Nvidia launched a new offering aimed at helping customers quickly deploy their generative AI applications in a secure, s Read more…

The Generative AI Future Is Now, Nvidia’s Huang Says

March 19, 2024

We are in the early days of a transformative shift in how business gets done thanks to the advent of generative AI, according to Nvidia CEO and cofounder Jensen Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Nvidia Showcases Quantum Cloud, Expanding Quantum Portfolio at GTC24

March 18, 2024

Nvidia’s barrage of quantum news at GTC24 this week includes new products, signature collaborations, and a new Nvidia Quantum Cloud for quantum developers. Wh Read more…

Houston We Have a Solution: Addressing the HPC and Tech Talent Gap

March 15, 2024

Generations of Houstonian teachers, counselors, and parents have either worked in the aerospace industry or know people who do - the prospect of entering the fi Read more…

Alibaba Shuts Down its Quantum Computing Effort

November 30, 2023

In case you missed it, China’s e-commerce giant Alibaba has shut down its quantum computing research effort. It’s not entirely clear what drove the change. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

DoD Takes a Long View of Quantum Computing

December 19, 2023

Given the large sums tied to expensive weapon systems – think $100-million-plus per F-35 fighter – it’s easy to forget the U.S. Department of Defense is a Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Leading Solution Providers

Contributors

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

Google Introduces ‘Hypercomputer’ to Its AI Infrastructure

December 11, 2023

Google ran out of monikers to describe its new AI system released on December 7. Supercomputer perhaps wasn't an apt description, so it settled on Hypercomputer Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Intel Won’t Have a Xeon Max Chip with New Emerald Rapids CPU

December 14, 2023

As expected, Intel officially announced its 5th generation Xeon server chips codenamed Emerald Rapids at an event in New York City, where the focus was really o Read more…

IBM Quantum Summit: Two New QPUs, Upgraded Qiskit, 10-year Roadmap and More

December 4, 2023

IBM kicks off its annual Quantum Summit today and will announce a broad range of advances including its much-anticipated 1121-qubit Condor QPU, a smaller 133-qu Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire