Polish HPC Consortium Boosts Prospects for Local Scientists

By Nicole Hemsoth

January 2, 2013

Poland is not usually thought of as a supercomputing powerhouse. Until recently, most of the local research and academic centers housed only modest-sized HPC clusters for Polish researchers. That is now changing with the POWIEW project, a consortium devoted to bringing world-class high performance computing to the nation’s scientists.

POWIEW provides five state-of-the art systems, based on the latest processor technology from Intel, AMD, IBM, and NVIDIA. The machines are spread across the consortium’s three member organizations: the Interdisciplinary Centre for Mathematical and Computational Modeling (ICM) in Warsaw, Krakow’s Academic Computer Centre (CYFRONET), and the Poznan Supercomputing and Networking Center (PSNC).

We asked Maciej Filocha, POWIEW’s project manager and director of its HPC division, to describe the impetus behind the organization and how they serve local researchers and scientists.

HPCwire: Can you describe the mission of POWIEW and the rationale for developing an indigenous supercomputing project for Poland?

Maciej Filocha: The POWIEW project sets up a unified strategy concept for the HPC development in Poland addressing research and academia. It encompasses a program of significant computational infrastructure enhancement, associated R&D programs and graduate and postgraduate education.

Since the early 2000s, the Polish HPC ecosystem was dominated by capacity-level cluster solutions — still relevant for many scientists, but obviously less so for “real” large-scale parallelism. To ensure competitiveness and attractiveness of Polish research organizations, local computational infrastructure was to be enhanced accordingly.

HPCwire: How do Polish scientists and researchers view the significance of HPC for their work?

Filocha: The POWIEW consortium consists of three leading research and academic HPC centers, founded about 20 years ago. From the beginning, the number of users has been growing and includes representatives of “classical” computational and life sciences as well as material sciences, engineering and environmental sciences.

HPCwire: What’s the level of funding for the project and where does it come from?

Filocha: The project is founded by the EU from the Innovative Economy Programme (85 percent), complemented by domestic sources (15 percent), with total budget of about 23 million euros (17 million USD). This covers not only acquisition and deployment of new computing systems but also R&D activities related to porting and optimization of selected codes for new architectures and general enabling actions.

HPCwire: What supercomputers are currently up and running at POWIEW, and how are they being used?

Filocha: The POWIEW Project focuses on two major HPC application areas: massively parallel processing (MPP) that delivers high scalability in fine-grained parallelism and symmetric multiprocessing for intensively coarse-grain parallel computational applications.

For the MPP class, the Blue Gene/P solution was chosen and has been running for almost two years with a full system load. The Blue Gene/P system is maintained by the CM) in Warsaw. This architecture is particularly useful by material science and life science researchers for its performance with high scalability on MPI applications. The system is also heavily used by neuroscientists where it enables simulations of large neural networks with reasonable performance. Most of the jobs running on the Blue Gene/P utilize a few thousand CPU cores.

For the second class of systems two solutions were identified: the IBM Power775 system installed at ICM in Warsaw and the SGI Altix UV SMP machine at the PSNC in Poznan. Both systems use the fat-node approach with the SGI UV implementing “true” SMP — one super node — while the Power775 represents a cluster of super nodes.

The Power775 machine is currently in operation for almost one year. It is used for the most demanding workloads, including high resolution atmosphere studies for weather predictions and very large cosmological simulations. The system has proven its high performance for memory-intensive and computing-intensive tasks.

The SGI machine in Poznan, being also a PRACE Tier-1 site, is the only SMP system of comparable size in Poland. It is used for memory-intensive tasks including reservoir modeling and complex simulations in astrophysics.

As a third technology choice, hardware-accelerated clusters have been identified. Both HPC centers in Poznan, and CYFRONET in Cracow, installed accelerated clusters choosing GPGPU solutions. GPUs in Cracow constitute a part of the largest supercomputer in Poland. Accelerators are widely utilized there to optimize locally developed codes for quantum chemistry computations and complex dynamics in astrophysics applications.

Another installation is the SGI/Rackable system maintained by PSNC, using AMD x86 servers accelerated with NVIDIA GPU cards. It is used for computing intensive tasks in molecular modeling and fluid flow dynamics in porous media — reservoir modeling.

HPCwire: Why such a wide variety of architectures? Doesn’t that create problems for users who want to share applications across platforms?

Filocha: An underlying idea for POWIEW was to provide all existing key HPC architectures based on complementarity and competencies sharing among project partners. Project experts are expected to provide support to the researchers so as optimize their choice of suitable architectures.
HPCwire: Poland is a member of PRACE. How does POWIEW fit into that consortium?

Filocha: All POWIEW project members are actively involved in PRACE activities since their beginning. They work in applications, hardware and policy-related tasks. Selected systems deployed within POWIEW project are now included as a Tier-1 systems in current Distributed European Computing Initiative (DECI) calls. Some of our computers, including the IBM 775 system are the first of its kind available for PRACE users. Our experience of day-to-day use of such systems allowed us to contribute significantly to best practices guides for PRACE users.

HPCwire: As far as the future of POWIEW, what’s being planned: new systems, collaborations, new application areas…?

Filocha: Formally, POWIEW will run until mid-2013, but the actual goal is to extend the deployed hardware infrastructure and acquired software competencies further, based on experience gained during last three years of intensive growth.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion XL — were added to the benchmark suite as MLPerf continues Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing power it brings to artificial intelligence.  Nvidia's DGX Read more…

Call for Participation in Workshop on Potential NSF CISE Quantum Initiative

March 26, 2024

Editor’s Note: Next month there will be a workshop to discuss what a quantum initiative led by NSF’s Computer, Information Science and Engineering (CISE) directorate could entail. The details are posted below in a Ca Read more…

Waseda U. Researchers Reports New Quantum Algorithm for Speeding Optimization

March 25, 2024

Optimization problems cover a wide range of applications and are often cited as good candidates for quantum computing. However, the execution time for constrained combinatorial optimization applications on quantum device Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at the network layer threatens to make bigger and brawnier pro Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HBM3E memory as well as the the ability to train 1 trillion pa Read more…

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HB Read more…

Nvidia Looks to Accelerate GenAI Adoption with NIM

March 19, 2024

Today at the GPU Technology Conference, Nvidia launched a new offering aimed at helping customers quickly deploy their generative AI applications in a secure, s Read more…

The Generative AI Future Is Now, Nvidia’s Huang Says

March 19, 2024

We are in the early days of a transformative shift in how business gets done thanks to the advent of generative AI, according to Nvidia CEO and cofounder Jensen Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Nvidia Showcases Quantum Cloud, Expanding Quantum Portfolio at GTC24

March 18, 2024

Nvidia’s barrage of quantum news at GTC24 this week includes new products, signature collaborations, and a new Nvidia Quantum Cloud for quantum developers. Wh Read more…

Alibaba Shuts Down its Quantum Computing Effort

November 30, 2023

In case you missed it, China’s e-commerce giant Alibaba has shut down its quantum computing research effort. It’s not entirely clear what drove the change. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

DoD Takes a Long View of Quantum Computing

December 19, 2023

Given the large sums tied to expensive weapon systems – think $100-million-plus per F-35 fighter – it’s easy to forget the U.S. Department of Defense is a Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Leading Solution Providers

Contributors

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

Google Introduces ‘Hypercomputer’ to Its AI Infrastructure

December 11, 2023

Google ran out of monikers to describe its new AI system released on December 7. Supercomputer perhaps wasn't an apt description, so it settled on Hypercomputer Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Intel Won’t Have a Xeon Max Chip with New Emerald Rapids CPU

December 14, 2023

As expected, Intel officially announced its 5th generation Xeon server chips codenamed Emerald Rapids at an event in New York City, where the focus was really o Read more…

IBM Quantum Summit: Two New QPUs, Upgraded Qiskit, 10-year Roadmap and More

December 4, 2023

IBM kicks off its annual Quantum Summit today and will announce a broad range of advances including its much-anticipated 1121-qubit Condor QPU, a smaller 133-qu Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire