STARnet Alliance Seeks Revolution in Chip Design
The Defense Advanced Research Projects Agency (DARPA) and the Semiconductor Research Corporation (SRC) have launched a new consortium to advance the pace of semiconductor innovation in the US as the technology approaches the limits of miniaturization.
The main thrust of the project is the creation of the Semiconductor Technology Advanced Research Network, aka STARnet, a network of six Semiconductor Technology Advanced Research centers, tasked with providing “long-term breakthrough research that results in paradigm shifts and multiple technology options.”
At each of the six STARnet university hubs – University of Illinois at Urbana-Champaign, University of Michigan, University of Minnesota, Notre Dame, University of California at Los Angeles and University of California at Berkeley – researchers will pursue CMOS-and-beyond technologies with an emphasis on design, software, system-level verification, and validation. By assessing and eliminating technological barriers identified by the International Technology Roadmap for Semiconductors (ITRS) and engaging in pre-competitive exploratory research, the teams will help secure the continued success of the nation’s microelectronics and defense industries.
DARPA and contributing companies have allocated $194 million in joint funding. Although the specific dollar amount varies according to their individual contracts, each STARnet center will receive more than $6 million annually for up to five years. The project is administered by Microelectronics Advanced Research Corporation (MARCO), a subsidiary of SRC.
The multi-disciplinary, collaborative effort draws upon the expertise of 148 faculty researchers and 400 graduate students from 39 universities. In addition to DARPA and SRC, members include the U.S. Air Force Research Laboratory, the Semiconductor Industry Association (SIA), and eight industry partners: Applied Materials, GLOBALFOUNDRIES, IBM, Intel Corporation, Micron Technology, Raytheon, Texas Instruments and United Technologies.
The semiconductor industry, a $144 billion market in the US, has so far benefited from a seemingly endless cycle of transistor shrinks, but Moore’s Law is waning. While researchers will likely find a way to squeeze silicon for another decade or so, there are undeniable physical limitations associated with the nanoscale frontier.
“The dimensions of the transistors of today are in the tens of atoms,” explains Todd Austin, professor of electrical engineering and computer science and C-FAR director. “We can still make them smaller, but not without challenges that threaten the progress of the computing industry.”
With microelectronics so tied to the nation’s security and economy, it’s imperative that these challenges are addressed. In the words of SRC Executive Director Gilroy Vandentop, “STARnet is a collaborative network of stellar research centers finding paths around the fundamental physical limits that threaten the long term growth of the microelectronics industry.”
A breakdown of the six multi-university teams and their primary areas of research:
- The Center for Future Architectures Research (C-FAR), led by the University of Michigan, is focused on computer systems architectures for the 2020-2030 timeframe. They anticipate that application-driven architectures that can leverage emerging circuit fabrics will be key to extending the life of CMOS technology. Participating universities include Columbia, Duke, Georgia Tech, Harvard, MIT, Northeastern, Stanford, UC Berkeley, UCLA, UC San Diego, Illinois, Washington and Virginia.
- The Center for Spintronic Materials, Interfaces and Novel Architectures (C-SPIN), led by the University of Minnesota, looks to electron spin-based memory and computation for its potential in overcoming challenges associated with traditional CMOS devices. Participating universities include UC Riverside, Cornell, Purdue, Carnegie Mellon, Alabama, Iowa, Johns Hopkins, MIT, Penn State, UC Santa Barbara, Michigan, Nebraska and Wisconsin.
- The Center for Function Accelerated nanoMaterial Engineering (FAME), led by the University of California, Los Angeles, is studying nonconventional materials, including nanostructures with quantum-level properties. The research seeks to support analog, logic and memory devices for “beyond-binary computation.” Participating universities include Columbia, Cornell, UC Berkeley, MIT, UC Santa Barbara, Stanford, UC Irvine, Purdue, Rice, UC Riverside, North Carolina State, Caltech, Penn, West Virginia and Yale.
- The Center for Low Energy Systems Technology (LEAST), led by the University of Notre Dame, will investigate new materials and devices for their potential to enable low-power electronics.Participating universities include Carnegie Mellon, Georgia Tech, Penn State, Purdue, UC Berkeley, UC San Diego, UC Santa Barbara, UT Austin and UT Dallas.
- The Center for Systems on Nanoscale Information Fabrics (SONIC), led by the University of Illinois at Urbana-Champaign, is exploring the benefits of a transitioning from a deterministic to a statistical model. Participating universities include UC Berkeley, Stanford, UC Santa Barbara, UC San Diego, Michigan, Princeton and Carnegie Mellon.
- The TerraSwarm Research Center (TerraSwarm), hosted by the University of California, Berkeley, seeks to develop city-scale capabilities using distributed applications on shared swarm platforms. Participating universities include Michigan, Washington, UT Dallas, Illinois at Urbana-Champaign, Penn, Caltech, Carnegie Mellon and UC San Diego.
“Each of these six centers is composed of several university teams jointly working toward a single goal: knocking down the barriers that limit the future of electronics,” comments DARPA program manager Jeffrey Rogers.
“With such an ambitious task, we have implemented a nonstandard approach. Instead of several different universities competing against each other for a single contract, we now have large teams working collaboratively, each contributing their own piece toward a large end goal.”
The project founders believe that long-term research is necessary to bolster semiconductor innovation and ensure the future of US military and industry competitiveness. They state that while short-term programs are suitable for sustaining an evolutionary pace, longer-term efforts are necessary to spur revolutionary advances, especially in light of impending technology constraints.
“STARnet will perform longer-term, more broad-based research, with the goal of expanding the knowledge base of the semiconductor industry, [and] researchers at STARnet centers willgenerate ideas for technology solutions,” notes the program literature.
Industry partners gain access to bleeding-edge research subsidized through Department of Defense funding. And while SRC estimates that STARnet research technology likely won’t be commercially viable for at least another 10-15 years, members will be able to sub-license the resulting IP.
STARnet continues the work of the Focus Center Research Program (FCRP), a similar program that has been in place since 1997 but is set to conclude on Jan. 31, 2013.