Micron Exposes the Double Life of Memory with Automata Processor
If we had to take a pick from some of the most compelling announcements from SC13, the news from memory vendor (although that narrow distinction may soon change) Micron about its new Automata processor is at the top of the list. While at this point there’s still enough theory to lead us to file this under a technology to watch, the concept is unique in what it promises—both to Micron’s future and the accelerator/CPU space for some key HPC-oriented workloads.
In a nutshell, the Automata processor is a programmable silicon device that lends itself to handling high speed search and analysis across massive, complex, unstructured data. As an alternate processing engine for targeted areas, it taps into the inner parallelism inherent to memory to provide a robust and absolutely remarkable (if early benchmarks are to be believed) option for certain types of processing.
For starters, here’s what not to expect from Micron’s foray into the processor jungle. First, this is not something that will snap in to replace CPUs. Despite what some of the recent press elsewhere has described, these are a lot less like pure CPU competitors (at least at this point) and more like specialty accelerators (think FPGAs versus Xeons, for example). These have been designed for a specific set of workloads, including network security, image processing, bioinformatics and select codes that propel the work of our three-letter overlords. The benefit here is that these are programmable, and in some ways reconfigurable and can chew on large-scale unstructured data analytics problems that the average conventional fixed word-width processors can’t always handle well.
Paul Dlugosch is director of Automata Processor Development in the Architecture Development Group of Micron’s DRAM division. “One thing people don’t understand well, aside from those memory researchers or people in this industry, is that any memory device is by nature a very highly parallel device. In fact, he says, “most of the power of that parallelism is left on the table and unused.”
He said that Micron has been stealthily developing their Automata technology for seven years—a process that was fed by a fundamental change in how they were thinking about memory’s role in large-scale systems. As Dlugosch told us, his company has been instrumental in rethinking memory with the Hybrid Memory Cube, but the memory wall needed some new ladders. The first rungs of which were those realizations that memory could be doing double-duty, so to speak.
At the beginning of their journey into automata territory, he said there were some fundamental questions about what caused the saturation of the memory interface and whether or not simply increasing bandwidth was the right approach. From there they started to think beyond the constraints of modern architectures in terms of how memory evolved in the first place.
Among the central questions are whether or not memory could be used as something other than a storage device. Further, the team set about investigating whether multicore concepts offered the shortest inroads to a high degree of parallelism. Also, they wondered if software that is comprised of sequential instructions and issued to an execution pipeline was a necessary component of systems or if there was a better way.
What’s most interesting about these lines of questioning is that his team started to realize that it might be possible that the memory wall was not erected because of memory bandwidth, but rather it was the symptom of a more profound root cause found elsewhere. That hidden weak point, said Dlugosch, is overall processor inefficiency. “What’s different about the automata processor is that rather than just trying to devise a means to transfer more information across a physical memory interface, we instead started asking why the mere need for high bandwidth is present.”
The specs you see there are a bit difficult to make sense of since semiconductors aren’t often measured in this way. For example, placing value on how many path decisions can be made per second in a semiconductor device working on graph problems or executing non-deterministic finite automata is a bit esoteric, but even with a basic grasp consider that in one single Automata processor it has this capacity. And you’re not limited to one, either, since this is a scalable mechanism. The Automata director tells us that this is, in theory, as simple as adding more memory. In other words, one can put 8 Automata processors on a memory module–that memory module can then plug into a DIMM, and since you can have more than one it’s possible that it can scale this processing power just like memory.
What one can expect on the actual “real” use front is a fully developed SDK that will let end users compile automata and load those into the processor fabric, allowing them to execute as many automata in parallel against large datasets as the user can fit into one or more of the Automata processors. The idea here is that users will develop their own machines.
As one might imagine, however, the programming environment presents some significant challenges, but Micron is tapping into some of its early partners to make some inroads into this area. Their base low-level underpinnings are, as Dlugosch admitted, “not as expressive as we’d like it to be to get the full power from this chip,” but they’re working it via their own ANML (Automata Network Markup Language) to let users construct Automata machines programmatically or almost in the sense of a full custom design Micron supports via a visual workbench. “You can think of it like circuit design for the big data analytics machines that users want to deploy in the fabric,” he said.
Outside of the technology itself, one should note that Micron is leveraging an existing process and facility to manufacture this processor. In other words, despite the long R&D cycle behind it, the overhead for production looks to be relatively minimal.
Automata processing is a fringe concept, but one that was obscure enough for Micron to take to market in the name. “A lot of people aren’t familiar with automata,” said Dlugosch. “We thought about this a great deal before we decided to call this an automata processor—even though automata are implemented as conventional algorithms in a variety of ways in a variety of applications. They’re not always recognized as automata, but in the areas and end use cases we’re targeting they are and will be used and the concept of automata computing will become more common starting in the HPC space first.”
Even if many aren’t immediately familiar with automata, it’s Micron’s hope that its processor will drive recognition of this processor type into the mainstream—and hopefully directly into the laps of big government, life sciences and other companies in need of high performance large-scale data processing.