Yesterday, we brought you a story about the iconic CDC 6500 supercomputer, which is currently undergoing restoration at the Living Computer Museum in Seattle. The CDC 6500 system, built by Control Data Corporation in 1967, was part of the CDC 6000 line, designed by Seymour Cray in the 1960s. The most famous of these was the CDC 6600. When it was released in 1964, the 6600 surpassed the competition by a factor of ten – earning it a place in history as the first successful supercomputer.

With a performance of about 1 megaflops, the 6600 was the fastest computer in the world until the introduction of the CDC 7600 in 1969. It was also the first computer designed in CDC’s Chippewa Falls, Wisc., lab – the birthplace of Seymour Cray and the future home of Cray Research. With a base model price of $6,891,300, the 6600 went for between $6 and $10 million, depending on options. Control Data Corp. sold more than one hundred of these machines mainly to government and university labs. Among the earliest customers was CERN, the European Organization for Nuclear Research, based in Geneva, Switzerland.

Striking video of the CERN installation emerged this week, bringing to life the big event that was the arrival of a new supercomputer. The 18-minute film below was shot in January 1965.

The high-quality archive footage details the role of this ground-breaking supercomputer at CERN, where the system was employed in the analysis of 2-3 million photographs of bubble-chamber tracks that CERN experiments were producing each year.

With 400,000 transistors and a clock speed of 100 nanoseconds, the CDC 6600 was a trend setter. In addition to being by far the fastest of its era, it was also one of the first to cool refrigerator-style with Freon and the first to use a CRT console. And while most computers of the day used a single CPU, the 6600 had a remarkable peripheral design, which the video recalls in detail.

“Because of its unique organization, the 6600 can accept information simultaneously from a wide variety of sources,” the narrator tell us. “It is a combination of an extremely high-speed central processor and ten peripheral processors that work together as a single system. Information entering the data channels is controlled by and passed into the peripheral processors, two of which are used by the SIPROS control system. These perform housekeeping chores to keep the central processor free to perform arithmetic calculations only.

“The central memory has 131,000 60-bit words of very fast access storage. The arithmetic section of the central processor is divided in ten parts and is designed for concurrent or parallel operation. This means that ten arithmetic operations can be performed at the same time at speeds approximating 3 million operations per second. Each of the ten peripheral processors also has computational capability with its own storage capacity of 4,000 12-bit words. Once calculations have been performed, information may be sent remotely to paper tape punches, consoles, typewriters or plotters via teletype, datalink or data phone – or output directly to online printers.”