The task of drawing discrete boundaries around the tech spheres known as HPC and big data is getting more complicated with each passing year. Many are anticipating convergence between these camps. One prominent HPCer waving the convergence flag is Satoshi Matsuoka, a professor at Tokyo Institute of Technology’s Global Scientific Information and Computing Center.
In his talk at the 2015 Blue Waters Symposium last month, Dr. Matsuoka made it clear that designing for data is not just a strategy, it’s the logical and inevitable response to two irrepressible drivers, the death of Moore’s law and the burgeoning data tsunami.
As part of the HPCI (High Performance Computing Infrastructure of Japan) consortium, Tokyo Institute of Technology will be fielding a number of supercomputers in the next five years. In this presentation, Matsuoka covers these plans, especially as they relate to data and memory, and then he delves further into the big data-HPC connection.
The design of the TSUBAME3.0 supercomputer, which is coming to Tokyo Tech in 2016, exemplifies the need to satisfy both extreme computing and huge data processing requirements. A successor to the TSUBAME2/2.5, TSUBAME3.0 will feature innovative technologies, including ultra-efficient liquid cooling and power control, petabytes of non-volatile memory, as well as low cost petabit-class interconnect.
Looking at how TSUBAME2.5 compares with Japan’s fastest supercomputer, K, Matsuoka puts up a slide that shows that cost of ownership for the K is 30X higher. He points out that K doesn’t throttle floating point units and also makes the case that TSUBAME2.5 achieves this cost efficiency because of its use of latest technologies, including commodity processors, silicon photonics, manycore chips, and fast memory. It was also one of the first HPC systems to use SSDs in all of the nodes, a technique that works much like today’s “burst buffer” technology.
Innovative design principles are also driving the requirements for TSUBAME3.0. Matsuoka lists the five facets of that coming system:
“Target numbers for the machine will be in the 20 petabyte range,” Matsuoka notes. “It will have very high memory and very high network bandwidth, but also very high capacity, high bandwidth in node to memory and also with the I/O sub-system, including non-volatile memory in order to accelerate I/O. If the cost speaks right, hopefully we will have petabytes of flash, and be able to drive the I/O sub-system over several terabytes per second.”
TSUBAME3 is a key part of the HPCI program, which is similar to the US XSEDE program in scale. HPCI has about 40 petaflops of aggregate computing capabilities currently and is on-track to reach a half-exaflop or higher by 2022. Matsuoka points out that the coming post-K supercomputer, a landmark system for HPCI and Japan, will be at least several hundred petaflops, very likely faster than the US CORAL machines, but it won’t break the exascale barrier.
Further, an overview of the combined plans for all nine centers over the next 10 years does not include an exascale machine by the 2021-2022 timeframe, but if current schedules prevail, the aggregate capacity of all the major academic supercomputers will reach an exaflop in that time frame, according to Matsuoka.
The revised roadmap isn’t a huge surprise. Japan had earlier come to the conclusion that fielding an exascale machine by 2020 by pushing a FLOPS-centric agenda would sacrifice real-world performance on a range of applications.
Matsuoka traces the main issue in HPC as it makes the transition from petascale to exascale to data. He illustrates the memory usage requirements of a set of applications (e.g., denderite simulation, whole city simulation, and others), specifically memory capacity versus memory bandwidth. Plotting these out with respect to exascale and efficiency (reasonable time to solution), it is clear that a large swath of applications requires both high memory capacity and high memory bandwidth.
Unfortunately most machines built in the next five years will not be able to satisfy this category. Matsuoka explains that given power and cost limitations, even a supercomputer that would be representative of a general-purpose machine in 2020 would not accommodate these requirements, while one that would satisfy these needs, would not meet power and cost constraints.
“As we go forward, the problem is not so much FLOPS, it’s mostly memory,” he states.
While there are some promising technologies coming down the pike, they demonstrate the tension between fast memory and high capacity. Take 3D integration of memory, and future processors — Xeon Phi, Nvidia Pascal and Fujitsu Sparc FX11 — that use 3D stacked memory technologies. These allow you to have very fast memory, but the capacity of the memory will be limited, which goes to prove the capacity versus bandwidth requirements will not be fulfilled, says Matsuoka. On the other hand, non-volatile roadmaps promise large capacity, but will potentially be even slower than conventional DRAM.
What this leads to is a system of extremely deep memory hierarchy, which leads to a need for software technology to deal with the hierarchy. The question is: can you have algorithms that can deal with the architectural change and can they be programmed without excessive difficulty and major source code changes?
Matsuoka and his colleagues are working on a class of algorithms that are communication-reducing and will also be easy to program. A challenge occurs where simulation size hinges on device memory capacity, as with stencil codes, like LES wind simulation. This brings Matsuoka to a discussion of the memory hierarchy of TSUBAME2.5, which has hybrid CPU-GPU nodes, and how that is helping to solve this difficult problem (see minutes 21:45 through 37:30 for details about specific techniques).
From data memory hierarchy to big data
In the past, big data has been something synonymous with mining people’s privacy to make money, says the professor, but big data is more than that.
Extreme big data will break down silos and enable an inducing of the problem. When rates and volumes are extremely immense, you have a supercomputing problem. This is already happening in science and engineering due to more abundant data sources and the open data movement. Specific application types are many, but some of the major ones are social network-related large graph processing, social simulation, genomics with advanced sequence matching and weather problems that require real-time large data assimilation.
Matsuoka: “When people ask me, ‘What does the future of cloud look like?’, I say the future of cloud, at least the core part that is handling big data, will look like supercomputers because that’s a necessity.”
End of Free Compute, Rise of Free Data
In the final stretch of the information-packed presentation, Matsuoka makes the case that optimizing for data is not just strategic but inevitable. As long as Moore’s law was alive and kicking, the free lunch of 1000x every decade left little incentive to look elsewhere for performance gain. But with its slowdown/death, what is the point of replacing a machine? It’s a serious problem, but performance growth is still possible with data-centric computing, he maintains.
The crux of Matsuoka’s argument is laid out in the following quoted paragraphs:
When the lithography shrinking ends, the power-per-transistor basically becomes constant, so we will be power-restricted no matter what we do. Our compute will be limited by the number of transistors we can afford given certain power but since transistor power will be constant, the number of transistors that we can afford per computation will become constant.
We can still build bigger machines with more transistors, but we can’t turn them all on for compute at the same time. As a lot of people predict, we will have specialization. There will be customized circuitries per each type of data, but depending on what kind of data and what type of compute we have, we will turn these on separately at various times, and this is already happening.
The memory will be subject to continued capacity growth with 3D stacking, and future generation innovations in direct silicon stacking and low power NVM (e.g. ReRAM). When we have integrated silicon 3D, data movement will be kept constant with the next-generation optics that can go up to terabits-per-layer. The entire energy bill will be capped because of the 3D/vertical design [that facilitates smaller movements in] the stack. When we have optics, and there is a certain cost to launch, but once you do that the movement of data will be constant no matter the distance (up to a certain point). There will be some elevation in terms of the energy, but once [implemented], no matter how big you make the machine, the energy bill will be constant — and you can broaden the bandwidth by using technology from long-haul carriers. This means that data will be free but compute will be expensive. And this is completely opposite to what we are thinking about for exascale.
Matsuoka anticipates that this phase-change will occur in tandem with the end of Moore’s law circa 2025-2030 and together with his partners and colleagues he is helping to prepare for this new era. Accelerating algorithms based on data properties is a key part of this agenda. “The growth of the data constants that are relevant to data like capacity or the bandwidth will be the driving force, the new Moore’s law,” says the professor. A number of projects, from AIST, Japan’s government lab, Hitachi and others, are moving forward under similar guiding principles.
By 2022, Japan is on track to fit the entire K computer into a single rack of TSUBAME4. The project is similar to efforts underway at HP (The Machine) and UC Berkeley (FireBox).
In closing, Matsuoka makes the case that not only is the HPC-big data convergence inevitable, the future of supercomputing depends on it:
“It’s not the FLOPS that are important, it’s how we drive the algorithms, the ecosystem, using the increase in the data capabilities, the bandwidth and the overall capacity and how to solve the associated software problems. Focusing on data is not only inevitable because of the big data requirements, it is the only way we can speed up our future generation machines and if we don’t achieve that, then the Crays, the IBMs and Fujitsus may stop making supercomputers.”