Graphene has been heralded as a potential Moore’s law extender. The single-atom layer of carbon is prized for its strength, flexibility, lightness and conductivity.
While most graphene electronics research has centered on its potential as a silicon replacement, a research project out of Stanford University has a different proposition, one that may, in fact, be a more feasible first-production-use of graphene.
In a chip, there are millions of nanowires that transmit data between transistors; the wires must be coated in order to protect the integrity of the transistors. Stanford engineer H.-S. Philip Wong found that wrapping these tiny wires in a protective layer of graphene could boost speeds by 30 percent.
Experiments conducted by Wong and his team point to graphene’s superior performance over tantalum nitride, which has been the traditional coating for these fine copper filaments. And not only does the graphene-optimized solution transmit data faster, the payoff is expected to be even more pronounced with future transistor shrinks.
Wong, the Willard R. and Inez Kerr Bell Professor in the School of Engineering, noted that he hopes his research will spark more interest in wires, which haven’t received as much attention as other areas of chip R&D.
“Researchers have made tremendous advances on all of the other components in chips,” he shared in a write-up on Stanford’s website, “but recently there hasn’t been much progress on improving the performance of the wires.”
As feature sizes get smaller, every element is open to reevaluation.
The wire coating must do double-duty as an isolator and an electrical conductor. As the tiny logic gate transistors carry out their switching function, the wires transport the information. The protective sheath prevents the copper from interfering with the silicon transistors.
The Stanford experiment showed that graphene could keep the copper contained while also acting as an auxiliary conductor of electrons. So it does the job of the current material and allows the wire to more data.
Another advantage of graphene relates to its facilitating the smaller features sizes of today’s microcircuitry. While making transistors smaller pays off in the form of more performant chips, making the wires smaller results in higher resistance (and heat) due to the effect of pushing the same current through a smaller channel. It takes much less graphene (about 8 times less) to provide the same isolating benefits of tantalum nitride, permitting the wire to stay roughly the same size while decreasing the overall diameter.
In today’s chips, graphene would boost wire speeds by about 4 percent to 17 percent, depending on wire length, but the engineers predict that two generations from now, the technology will enable a 30 percent.
Using graphene for this purpose is more straight-forward than using it as a semiconductor substrate due to limitations like the lack of a band gap. But in either case, volume production is still a a barrier. One of the next steps is to explore techniques to grow graphene directly onto wires while the chips are being manufactured.
“Graphene has been promised to benefit the electronics industry for a long time, and using it as a copper barrier is perhaps the first realization of this promise,” Wong said.
Several team members presented the research paper at the Symposia of VLSI Technology and Circuits in Kyoto, Japan, a major venue for the electronics industry. The results and findings were part of a short course, titled More-than-Moore and More Moore for IoT.