HPCwire: HPC Gets Virtual; AMD Gets Graphic

The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing

HPCwire >> Blogs

Blog: From the Editor

October 27, 2006

HPC Gets Virtual; AMD Gets Graphic

The problem is a well understood one: Microprocessor performance has outstripped data communication performance, which limits performance of data-intensive applications on standard cluster architectures. The temptation is to scale the cluster out even more, but this yields diminishing returns since the imbalance between the CPU and interconnects scales as well. It's like trying to make a car go faster by adding more valves to the engine.

Three OEM start-ups -- Fabric7, PANTA System and Liquid Computing -- are attacking the problem with scale-out commodity architectures and each has come up with a compelling design. In August, we focused on Fabric7's solution, and last week, PANTA Systems' new offering. In this week's issue, we spotlight Liquid Computing via an interview with the CEO and co-founder, Brian Hurley. Their new product is being announced for general availability next week.

Although the three companies have come up with rather different architectures, they are employing similar approaches. But you wouldn't guess that talking with them. In my conversations with the trio over the past few months, each tried to distance its solution from the other two. And while the three designs are very different, the basic technology is similar.

The common piece in the solution is to use HyperTransport (HT) technology to control allocation of hardware resources (CPUs, I/O, memory, and network communication) at the physical level. Each vendor provides a software interface that enables the user to dynamically create or dissolve HT communication links to various resources. This allows the user to more easily balance data bandwidth requirements with computing resources. With today's HT technology and AMD dual-core processors, an 8-way (core) SMP is possible. In 2007, the next generation of technology will allow for a 32-way SMP configuration, and a year after that, 128-way systems.

The other common architectural element involves just adding more data pipes in the machine, which helps to address the traditional imbalance in computation versus communication.

The capability to create designer SMP nodes from a common pool of highly connected hardware seems pretty novel. But virtualization via hardware is an established concept. Mainframes have been doing hard partitioning for years. But users pay a lot for this flexibility. With the advent of standard HyperTransport technology, this capability is now available to commodity AMD processor-based systems. Offering resource virtualization -- and by extension, reliability -- with industry standard parts challenges the big UNIX and Linux machines used for data-intensive enterprise computing. At the same time, it provides a more flexible design to fixed-architecture clusters and offers an interesting alternative for high performance technical computing users.

While virtualization is already well-established in the enterprise, its adoption into HPC will require some re-education. The problem here is that the term has become stigmatized to suggest that it comes with a performance penalty -- a big no-no in the HPC culture. This is because conventional virtualization solutions in the enterprise involve a software layer that consumes CPU cycles. The HyperTransport-based solution avoids this particular drawback by establishing hardware resources at the physical layer.

Using virtualization and faster interconnects to make a more flexible commodity-based computing system has a lot of appeal. According to Liquid Computing, IDC believes that about half of the potential market for HPC clusters are held back because of some of the issues that an interconnect-centric architecture addresses. Being able to improve manageability by moving away from the departmentalization of clusters across a company towards a more consolidated infrastructure is something many large enterprise HPC users could benefit from. For that half of the cluster market, the classic enterprise RAS (Reliability, Availability and Serviceability) features are highly valued. And the consolidation of resources has the added benefit of reducing energy, cooling and space requirements.

Because of all the advantages of this type of scalable architecture, the market opportunities span technical computing, high performance enterprise computing, IT outsourcing/ASP, and telecom OEMs. The three vendors are feeling their way into these markets. Currently, Fabric7 is concentrating its efforts on the enterprise market, but is keeping an eye on HPC. PANTA Systems seems to be going after both the enterprise and HPC markets from the get-go. Liquid Computing, while initially targeting HPC, appears to want to use that sector as a springboard to a broader IT market.

With the merging of HPC with enterprise computing, it's a confusing time for both vendors and users. Andy Church, VP of Marketing at Liquid Computing, reported that in conversations they've had with IDC's Earl Joseph, the analyst confirmed the notion that there is a gray area between traditional high performance technical computing and enterprise IT outsourcing. This is reflected by the range of users interested in Liquid Computing's offering. The company's early adopters include customers in the enterprise technical computing, ASP, IT outsourcing and telecommunications OEM markets. For vendors like these, it's becoming more difficult to talk about enterprise computing and HPC as separate markets. "Our perspective is that those worlds are merging," said Church.

-----

AMD + ATI = Fusion

It's AMD's fault. I vowed to stop writing about GPUs for at least a few issues. But with this week's announcement by AMD to build integrated CPU-GPU processors based on x86 cores and ATI GPU technology, I'm forced to add a few more thoughts on the topic.

The news of this hybrid processor initiative came on the same day that the merger of the AMD and ATI was finalized. To me, this is like announcing plans for your first baby during your honeymoon, which suggests that the two companies were devising this idea during their early courtship. By the way, AMD gets to be the groom in this metaphor since it will keep its name. ATI gets subsumed into AMD, website and all.

Without going into much detail in the announcement, AMD declared its plans to create a new class of x86 processor that integrates CPUs and GPUs at the silicon level with a design initiative called "Fusion." The new processors will target all computing platforms currently supported by AMD, including laptops, desktops, workstations and servers, as well as consumer electronics. According to the company, the first Fusion processors will come to market in late 2008 or early 2009. In that time frame, the use of 45nm process technology will allow enough room on the die for large GPUs and CPUs to co-mingle and do so within a reasonable thermal envelope.

Compared to separate CPU and GPU device configurations, integrating the two types of computing engines into one chip should yield much better performance and performance-per-watt for applications using 3D graphics, digital media processing and high performance computing. Application-wise, that's a pretty big tent. But it gives you a good sense of where AMD thinks IT growth is going to occur.

This presents an interesting challenge for rival Intel. Basically its choices are:

Buy NVIDIA for their GPU technology. An increasingly unlikely event, given that neither of the two companies seems interested in such an arrangement.
Morph its own graphics division to produce higher-end devices. An expensive proposition, but cheaper than buying NVIDIA.
Beef up the native x86 Streaming SIMD Extensions (SSE) capability to compete with GPU capability. Maybe a more likely scenario, but a less flexible approach overall.
Ignore the trend and hope GPUs aren't the "next big thing" in general-purpose processing. The riskiest choice of all.

In attempting to side-step Intel, AMD is betting its future on this new vision of CPU-GPU computing. AMD's track record for redefining processor architectures is pretty impressive. When the company took the x86 into the 64-bit space in 2003, Intel was forced to follow. AMD's development and use of the HyperTransport technology and the on-chip memory controller provided a sound basis for multi-core scalabilty, and is expected to be duplicated by Intel with their CSI bus and their processor-based memory controller. Will history repeat itself once again?

-----

As always, comments about HPCwire are welcomed and encouraged. Write to me, Michael Feldman, at editor@hpcwire.com.

Posted by Michael Feldman - October 27 @ 12:00AM

(Digg, Technorati, more)

Discussion

There are 0 discussion items posted.

Join the Discussion

You must be a registered user in order to comment on HPCwire stories.

Members enjoy:

	Access to Special Content, including Podcasts, Webcasts, and Whitepapers and more!
	Ability to take an active role in the discussions that are shaping the HPC technology discipline!
	Special offers available only to HPCwire members!

Become a Registered User Today!

Registered Users Log in Here to Comment

Email Address:	Password (case sensitive)

Remember me	Forgot Password?

Michael Feldman

Michael Feldman is the editor of HPCwire.

More Michael Feldman

Feature Articles

Moscow State University Supercomputer Has Petaflop Aspirations

The Moscow State University supercomputer, Lomonosov, has been selected for a high-performance makeover, with the goal of tripling its processing power to achieve petaflop-level performance in 2010. T-Platforms, who developed and manufactured the supercomputer, is the odds-on favorite to lead the project.
Read More...

Intel Ups Performance Ante with Westmere Server Chips

Right on schedule, Intel has launched its Xeon 5600 processors, codenamed "Westmere EP." The 5600 represents the 32nm sequel to the Xeon 5500 (Nehalem EP) for dual-socket servers. Intel is touting better performance and energy efficiency, along with new security features, as the big selling points of the new Xeons.
Read More...

The Week in Review

The ACM Turing Award goes to the creator of the modern personal computer; and Voltaire announces a mid-range InfiniBand switch and new technology that accelerates distributed applications. We recap those stories and more in our weekly wrapup.
Read More...

Read more HPCwire features...

Top Headlines

Intel Partners See 'Easy' Upgrade Path With Xeon 5600 Chips

Mar 18 | ChannelWeb | Westmere parts already showing up in HPC machines. Read more...

AMD: OEMs primed for Opteron 6100s

Mar 17 | The Register | But what about the tier ones? Read more...

Arrival of the Desktop Supercomputer

Mar 17 | Cadalyst Magazine | A new generation of workstations is changing the nature of technical computing. Read more...

Scheduling HPC In The Cloud

Mar 17 | Linux Magazine | Latest iteration of Sun Grid Engine able to tap into Cloud. Read more...

Tailoring Medicine with Supercomputers

Mar 16 | Bio-IT World | Biotech firm builds genetic models from patient data. Read more...

Read more headlines...

Featured Whitepapers

Virtualization for Aggregation And The vSMP Architecture™

Jan 12 | | In-depth look at vSMP Foundation server virtualization technology, technical implementation, use cases and capabilities. The technical whitepaper provides an architectural overview and details on the three vSMP Foundation products: vSMP Foundation for SMP, vSMP Foundation for Cluster and vSMP Foundation for Cloud.

Copper Cable Technologies for High Performance Computing

Jan 18 | | This white paper discusses Gore’s copper cable assemblies, and how they continue to exceed the standards for providing reliable, cost-effective solutions for high-performance computer applications.

View the White Paper Library

Multimedia

Webcast: Virtualized Data Center Roundtable

Join this online panel discussion for live Q&A with leading industry experts, analysts, and end-users to discuss the latest innovations, best practices, barriers to implementation, and measurable benefits of server virtualization with a particular focus on today's real world solutions.

Webcast: Watch SC09 Birds of a Feather Video: Scalable Fault-Tolerant HPC Supercomputers

Learn about scalable fault-tolerant architectures and examples of energy efficient and scalable supercomputing clusters using dual QDR InfiniBand to combine capacity computing with network failover capabilities with the help of programming languages such as MPI and a robust Linux cluster management package.

Webcast: High Performance Computing for a Smarter Planet

LIVE@SCO9: The IBM team discusses new innovations in hardware, software and services that help clients better understand their workloads and get insight from their R&D efforts. Technology demonstrations include the soon-to-be-released Power7 HPC processor, the DCS990 system with 2.4 petabytes of storage, the xCAT management tool, secure HPC cloud computing and more. Winners of two HPCwire Readers' and Editors’ Choice Awards! Take the IBM virtual tour at SC09 or more information go online to: http://www-03.ibm.com/systems/deepcomputing/sc09.html