HPCwire: Enforcing Moore's Law

The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing

HPCwire >> Blogs

Blog: From the Editor

February 02, 2007

Enforcing Moore's Law

Last Friday Intel demonstrated x86 processors with twice the transistor density of its current designs. Using 45nm process technology and new transistor materials, the company said it has achieved a significant breakthrough in transistor design and that this technology will be incorporated into production microprocessors in the second half of 2007. Although IBM also announced its plans for 45nm processors last Friday, Intel will be the first chipmaker to deliver the new technology into the marketplace.

The technology that makes the move to 45nm possible involves new materials that dramatically reduces transistor leakage -- an increasingly vexing problem with each new processor shrink. The new 45nm processors will use a hafnium-based high-k insulator in the gate dielectric and metal gate electrodes to reduce leakage significantly. The new materials replace silicon dioxide as the gate dialectric and polysilicon as the gate electrode, two compounds which have been used in transistors for decades. The new combo will enable Moore's Law to continue for at least a couple more processor generations before even more advanced technology is required.

It seems fitting that Intel is the chipmaker leading the charge for Moore's Law. In 1965, Gordon Moore, the company's co-founder, made the empirical observation that the number of transistors on an integrated circuit would double every two years (since updated to every 12-18 months). It was a self-fulfilling prophecy. He has not only lived to see the Law upheld for over forty years, but also the replacement of the underlying transistor technology, which had remained unchanged for almost as long.

According to Moore, "the implementation of high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s."

Intel says that the new technology can be used to increase the performance or decrease the power requirements on the new chips -- something that had been increasingly hard to balance as transistor leakage started to become more serious in the last couple of processor shrinks. The engineers tell us the new technology provides a 30 percent reduction in transistor switching power and more than a 10x reduction in gate leakage. With the revamped transistor materials, Intel can be much more aggressive with dialing the clock up for higher performance or dialing it down to increase energy efficiency.

Using similar transistor materials to Intel, IBM has also been designing 45nm circuitry for some time, but it won't be begin production of processors based on that technology until 2008. This puts it at least six months behind Intel (probably more), which means IBM and its partners -- AMD, Toshiba, Sony and others -- will be playing catchup once again in the process technology race. AMD in particular stands to suffer, since its x86 processors go head-to-head against Intel's offerings. Since AMD has to fight the transistor technology battle through its IBM proxy IBM, it doesn't have as much control as Intel does when it comes to coordinating the process technology with its processor design.

Nevertheless, AMD is looking to make up for some lost ground in 2007. When the quad-core Opteron 'Barcelona' chip (65nm) is released this summer, AMD engineers claim they will have a 40 percent performance advantage over the comparable Intel 'Clovertown' processor.

But that advantage might be short-lived. Conceivably, Intel could roll out a 45nm quad-core processor this year. That chip would likely to be more powerful than the 65nm Clovertown or Barcelona, and perhaps more energy efficient as well. The 45nm process size gives Intel some options that compensate for their older front-side-bus and off-chip memory controller. With smaller transistors, extra die space can be used to add more cache (less memory accesses) or more CPU intelligence to increase performance.

Intel claims it is now a full year ahead of its competitors in process technology. While AMD hardware still retains an advantage in scaled up systems, it can't afford to fall too far behind Intel in the fundamentals. The typical cycle has been for Intel to claim the advantage when it moves to a new process technology and then lose it when AMD's processors reach the same level. If AMD falls more than a process generation behind, it won't be able to play leap-frog anymore.

HPC vendors that rely on AMD for their clusters or supercomputers may begin to fret if the processor technology gets too far behind the curve. Cray, in particular, has a long-term arrangement with AMD to use Opterons in its next generation supercomputers through the end of the decade. Other HPC OEMs that offer clustered servers with either Xeons or Opterons have more flexibility, but the dual-vendor arrangement has been valuable in and of itself to help keep the x86 market competitive.

AMD can take some comfort in the fact that transistor technology advancements do not drive the industry the way they did 10 years ago, when CPU speed was everything. Today, memory bandwidth has become such a limiting factor in relation to CPU performance that processor architecture and system architecture is at least as important. This is especially true in the scaled up multi-processor machines that inhabit the datacenters of high performance computing users. And it is here that AMD, with its HyperTransport bus technology and integrated memory controller, still claims the advantage over its rival.

Also, by using silicon-on-insulator (SOI) and strained silicon technologies for its chips, AMD is able to compensate for its larger transistor sizes. SOI is more expensive to manufacture, but offers higher performance than conventional silicon. It's one of the reasons why AMD processors are so competitive with their Intel counterparts once they reach the same transistor geometries.

Intel has committed to maintain a two-year technology cadence -- their so-called 'tick-tock' model -- that encompasses a processor shrink (tick) followed by a new microarchitecture design (tock). It can be a challenge to line up this model with the demands of the various x86 markets. A Centrino-based laptop might be replaced every two years, while a Xeon-based supercomputer is more likely to have at least a five or ten year life. Superimposed on this is the fact that the laptop user may have very little use for more cores, extra cache or better performance if existing consumer software can't take advantage of it. On the other hand, the supercomputer user is much more likely to use all of these capabilities.

Eventually the marketplace will decide the value of processor technology advancements. Both Intel and AMD have to navigate the diverse markets they serve with the x86, but ultimately they are counting on the OEMs and their customers to join them on the technology treadmill.

-----

As always, comments about HPCwire are welcomed and encouraged. Write to me, Michael Feldman, at editor@hpcwire.com.

Posted by Michael Feldman - February 2 @ 12:00AM

(Digg, Technorati, more)

Discussion

There are 0 discussion items posted.

Join the Discussion

You must be a registered user in order to comment on HPCwire stories.

Members enjoy:

	Access to Special Content, including Podcasts, Webcasts, and Whitepapers and more!
	Ability to take an active role in the discussions that are shaping the HPC technology discipline!
	Special offers available only to HPCwire members!

Become a Registered User Today!

Registered Users Log in Here to Comment

Email Address:	Password (case sensitive)

Remember me	Forgot Password?

Michael Feldman

Michael Feldman is the editor of HPCwire.

More Michael Feldman

Feature Articles

The Week in Review

The ACM Turing Award goes to the creator of the modern personal computer; and Voltaire announces a mid-range InfiniBand switch and new technology that accelerates distributed applications. We recap those stories and more in our weekly wrapup.
Read More...

Florida State Gives Virtual SMPs a Spin

The prospects for virtual SMP technology got another boost last month when Florida State University announced it had installed a new HPC system from 3Leaf Systems. The servers are being housed at the university's HPC facility and will be used across a range of scientific disciplines.
Read More...

HPC Powers Bobsled Team to Olympic Gold

For the first time in 62 years, the four-man Olympics bobsled team from the US captured the gold medal, setting a course world record in the process. The winning bobsled had some state-of-the-art engineering behind it, including CFD software from Exa Corporation. As it turned out, that software may have proved to be the margin of difference in the race.
Read More...

Read more HPCwire features...

Top Headlines

GP-GPUs: OpenCL Is Ready For The Heavy Lifting

Mar 11 | Linux Magazine | CUDA may be the rage, but OpenCL is a standard that has some features you may need. Read more...

Can Free Software Drive the Fourth Paradigm?

Mar 09 | Free Software Magazine | Data-driven computing will need open software. Read more...

Graphics Card Maker Turns to High-Performance Bioinformatics

Mar 09 | Bio-IT World | Tahoe Informatics founder eyes GPUs, CUDA software. Read more...

CFD: Light at the End of the Tunnel?

Mar 08 | Sporting Life | Formula One engineers differ on benefits of CFD. Read more...

AMD Tries to Draw Intel Into Chip Battle

Mar 08 | InfoWorld | AMD offers up 48-core server prize. Read more...

Read more headlines...

Featured Whitepapers

Virtualization for Aggregation And The vSMP Architecture™

Jan 12 | | In-depth look at vSMP Foundation server virtualization technology, technical implementation, use cases and capabilities. The technical whitepaper provides an architectural overview and details on the three vSMP Foundation products: vSMP Foundation for SMP, vSMP Foundation for Cluster and vSMP Foundation for Cloud.

Copper Cable Technologies for High Performance Computing

Jan 18 | | This white paper discusses Gore’s copper cable assemblies, and how they continue to exceed the standards for providing reliable, cost-effective solutions for high-performance computer applications.

View the White Paper Library

Multimedia

Webcast: Virtualized Data Center Roundtable

Join this online panel discussion for live Q&A with leading industry experts, analysts, and end-users to discuss the latest innovations, best practices, barriers to implementation, and measurable benefits of server virtualization with a particular focus on today's real world solutions.

Webcast: Watch SC09 Birds of a Feather Video: Scalable Fault-Tolerant HPC Supercomputers

Learn about scalable fault-tolerant architectures and examples of energy efficient and scalable supercomputing clusters using dual QDR InfiniBand to combine capacity computing with network failover capabilities with the help of programming languages such as MPI and a robust Linux cluster management package.

Webcast: High Performance Computing for a Smarter Planet

LIVE@SCO9: The IBM team discusses new innovations in hardware, software and services that help clients better understand their workloads and get insight from their R&D efforts. Technology demonstrations include the soon-to-be-released Power7 HPC processor, the DCS990 system with 2.4 petabytes of storage, the xCAT management tool, secure HPC cloud computing and more. Winners of two HPCwire Readers' and Editors’ Choice Awards! Take the IBM virtual tour at SC09 or more information go online to: http://www-03.ibm.com/systems/deepcomputing/sc09.html