Microsoft Puts GPU Boosters on Azure Cloud

Sep 29, 2015 |

Today at its AzureCon, Microsoft expanded the capabilities of its public cloud, Azure, with the addition of N-series GPU-enabled virtual machines available over a fast RDMA network. The company also announced that it is reducing prices on its high-end instances, A8-A11. Jazon Zander, corporate vice president at Microsoft Azure, began by presenting a view of Azure Read more…

Paving Pathways to Success through Broader Engagement

Sep 28, 2015 |

It’s no secret that industries struggle to build and sustain a diverse science and technology (S&T) workforce, but entering and advancing within the pipeline are far from equal-opportunity endeavors. Despite industry efforts to support their success, women, minorities and people with disabilities continue to encounter deeply-ingrained social and institutional barriers to entry.

IBM & OpenPOWER: Accelerating Business Applications in the Data-Driven Enterprise with CAPI

Sep 28, 2015 |

CAPI-attached acceleration has three pillars: accelerated computing, accelerated storage, and accelerated networking. Connected coherently to a POWER CPU to give them direct access to the CPU’s system memory, these techniques leverage accelerators like FPGAs and GPUs, storage devices like flash, and networking devices like Infiniband.   These devices, connected via CAPI, are programmable using simple Read more…

AI’s Forward March: Machine Teaches Itself to Play Chess in 72 Hours

Sep 23, 2015 |

The field of artificial intelligence has had a rocky history with numerous setbacks, but there have been high points too, like when IBM’s Deep Blue beat reigning chess champion, Garry Kasparov, in 1997, or when another IBM machine, Watson, proved its mettle on the popular quiz show Jeopardy, in 2011. Now machine learning, and its Read more…

Chief Processor Architect Exits AMD

Sep 22, 2015 |

Jim Keller, former chief architect of microprocessor cores at AMD, left the chip company for the second time last week to pursue other opportunities. Keller was in charge of the company’s next-generation x86 “Zen” cores, which take center stage in AMD’s roadmap and in its strategy to combat larger rival Intel. Not due out until Read more…

Optimization Techniques for the Intel® MIC Architecture: False Sharing and Padding

Sep 21, 2015 |

False Sharing and Padding is the final installment of a 3-part educational series on Optimization Techniques for the Intel® MIC Architecture by Colfax Research. The series focuses on select topics on optimization of applications for Intel’s multi-core and manycore architectures (Intel® Xeon® processors and Intel® Xeon Phi™ processors). In False Sharing and Padding, the authors Read more…

HPC User Forum Presses NSCI Panelists on Plans

Sep 17, 2015 |

In less than two months, the National Strategic Computing Initiative (NSCI) Executive Council must present its implementation plan. Just what that will look like remains a mystery but budgets, governance, and private-public partnering models were on the minds of attendees to last week’s HPC User Forum in Broomfield, CO, where the first public panels with Read more…

HP Enterprise Will Cut 25,000 to 30,000 Jobs; Reactions Mixed

Sep 16, 2015 |

Even before it gets off the ground, HP Enterprise – one of the two companies HP will split into by year’s end – is getting its wings clipped. HP announced plans yesterday to cut 25,000 to 30,000 jobs from HP Enterpise. It’s not yet clear what this will mean for HP aspirations and operation in Read more…

ALCF’s Paul Messina on the Code Optimization Path to Exascale

Sep 14, 2015 |

To borrow a phrase from paleontology, the HPC community has historically evolved in punctuated equilibrium. In the 1970s we transitioned from serial to vector architectures. In the 1980s parallel architectures blossomed, and in the 1990s MIMD systems became the norm for most supercomputer architectures. From the 1990s until today we have been in a period Read more…

Strip-Mining for Vectorization to Achieve Order of Magnitude Improvement

Sep 14, 2015 |

Strip-Mining for Vectorization is the focus of the second installment of a 3-part educational series from Colfax International introducing select topics on optimization of applications for Intel’s multi-core and manycore architectures (Intel® Xeon® processors and Intel® Xeon Phi™ coprocessors). This paper discusses data parallelism with a focus on automatic vectorization and exposing vectorization opportunities to Read more…