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April 28, 2006
In the second part of our interview with Intel CTO, Justin Rattner, he shares his thoughts on the open source hardware model, answers our concerns about the future of the Itanium microprocessor, and talks about some innovative applications for flash memory in the HPC arena.
Open Source Hardware
Although the concept of open source hardware has been around for several years, only recently has it received the attention of major chip vendors. In December of 2005, IBM decided to make its PowerPC 405 core design freely available to researchers and academia. In that same month, Sun Microsystems announced it would make its 8-core UltraSPARC T1 microprocessor 'Niagara' design freely available to anyone, including other vendors. In March of this year it released the Verilog source code for the T1. We asked Justin Rattner what he thought about this new model for building microprocessor ecosystems.
"I'm really struggling to understand it," admits Rattner. "Hardware is very different from software"
From his point of view, designing microprocessors requires a much larger investment than developing software. Developing a microprocessor require years of design and testing using highly specialized tools. This is followed by production in an expensive fab. He contrasts this with the less resource-intensive model of software, where prototyping can be done relatively quickly and then developed incrementally, often by sharing with other developers across the Internet.
"For software, the non-recurring engineering costs are relatively low as compared to hardware, where they're relatively high," says Rattner. "Also, I think the successful open source projects are highly managed communities. There's the sense that everyone's pouring code into this funnel and good things are coming out the bottom. But if you look at Linux, Apache and some of the other real successes with open source, there's tremendous management involved in them. Trying to manage those kind of contributions in a hardware context seems to me to be formidable, and certainly unproven. I think we'll watch to see how it goes and see what benefits come from it."
Rattner also notes that the processor volume has to approach the hundreds of millions to attract software developers. "Even investment funds, such as the Itanium Solution Alliance, have to deal with that reality," he says. "Developers have to choose the platform that's going to provide them with the necessary return. I think that's really at the bottom of whole question. Putting an architecture in open source really doesn't alter that fundamental volume question."
Itanium Too
Speaking of Itanium, the CTO believes Intel's 64-bit answer to RISC is gaining momentum in the high-end server market. He points to the recent surge of the Itanium in Japan, where systems from NEC, Hitachi and Fujitsu are outpacing both Sparc- and Power-based servers. He also sees Itanium volume ramping up here. Its former rivals, MIPS and Alpha are all but gone from the server market, and HP's PA-RISC processor is being retired to make way for the Itanium.
"We're continuing to make a substantial investment in Itanium," says Rattner. "We've got the Montecito coming to market. We've got processors in the design pipeline. The volumes are actually building relative to its direct competition, namely Sparc and Power. We firmly believe that it is destined to become the high-volume post-RISC microprocessor out there."
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