The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing
October 27, 2006
HPC and modern computing in general has a seemingly insatiable demand for more performance, better efficiency and scalability. Now with the expansion of computing to practically every commercial and non-commercial endeavor, an additional requirement is to apply these attributes to a much wider range of applications.
"So there's a need there for more types of processing," says Jeff Jussel, vice president of marketing and general manager of the Americas for Celoxica. "There's a number of ways the industry is addressing that -- with massively parallel processing (MPP) and with all sorts of different types of co-processors. At Celoxica, we believe that the FPGA represents a huge opportunity for co-processing, because it can deliver the massive parallelization, with the advantages of custom hardware, but in a way that is programmable."
But there are three things that you need in order for FPGAs to really take off:
"That's where the tools that Celoxica provides comes in," says Jussel. "That's our mission in life -- to make that FPGA programming transparent. And in doing so, enable FPGA use for the high performance computing market."
As part of this strategy, this week Celoxica announced a new off-the-shelf hardware and software compiler design bundle for high performance computing using HyperTransport (HTX) slots. The HTX bundle combines an intellectual property (IP) core for HTX connectivity, an FPGA-based HTX acceleration card and a software programming environment. The solution is designed to allow users to accelerate applications in Opteron-based computing systems with FPGA co-processing and HyperTransport technology. The bundle provides compilers that map C code onto FPGA hardware, a run-time OS (RTOS) for FPGA computing, and FPGA hardware that plugs into a host server system.
The hardware consists of the RCHTX acceleration card, which includes two Xilinx Virtex 4 FPGAs devices (in the future it will support more advanced Virtex 5 devices), 24 MB of QDR SRAM, and a range of I/O. The main co-processor FPGA is a 16 million gate device that is meant to run the user algorithms. The second FPGA is configured as a bridge, containing an HTX IP core developed by Celoxica. The bridge FPGA and IP provide the HyperTransport interconnect between the FPGA co-processor and the host processor system and memory space.
The software component consists of the DK Design Suite, which includes a C compiler for programming the FPGA co-processor, a board support package (BSP) and data communications drivers for the RCHTX card, a basic floating point library (single and double precision) and the software API which provides the interfaces.
The idea is not for the user to port their whole application to the FPGAs, just the compute-intensive algorithms that represent the workload bottlenecks. For example FFT calculations, a Black Scholes algorithm or wave migration calculations can be offloaded to the FPGA to take advantage of the parallel hardware resources.
The user replaces the algorithm loop in the original FORTRAN or C source with a Celoxica API call, which calls the C code that will be compiled into the FPGA. Jussel says the original algorithm needs to be "tweaked" somewhat to insert parallelism, but they've tried to simplify this as much as possible. The FPGA C compiler brings in the appropriate run-time pieces to make it work in its new hardware environment. At execution time, the data communication between the host processor and the FPGA is done across the HyperTransport connection, but this is transparent to the user.
Jussel notes that the product announced this week represents the first FPGA solutions that uses the HTX slot. DRC Computer Corporation has a somewhat similar solution, where its FPGA uses an Opteron socket to directly connect to HyperTransport. As it turns out, DRC is an OEM partner with Celoxica and makes use of the same C compiler technology.
Celoxica's current (beta) customers for the HTX solution are in the financial services, oil & gas, and life sciences industries. With this particular product, users have achieved a 200X performance improvement for the application (offloading a Black Scholes algorithm to the FPGA).
"We've done enough with the finance industry to know that the metric we need to hit is about a 10X price-performance benefit," says Jussel. "If we hit that 10X factor then it's worth it for them to invest in new technology. And we've been able to show quite a bit greater than 10X for all these applications."
Even though this HTX product includes the FPGA card, hardware is not Celoxica's main focus. The company's real goal is to be the leader in compilers and the run-time support for FPGAs. Jussel says that compared to other FPGA compiler companies, Celoxica is quite a bit larger and more established, having developed and matured its software technology over the past 10 years. It provides the compiler for the SGI RASC RC100 system as well as Cray FPGA systems, not to mention its large customer base in the embedded computing space -- still the majority of their business. But because FPGAs have this unique aspect of reconfigurability and high performance, the company believes that these devices will become ubiquitous throughout computing. And Celoxica wants to be there with their software.
Says Jussel: "We really want to be the Microsoft of FPGA computing. We want to provide the compilers and RTOS for that solution."
(Digg, Technorati, more)
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Source: Addison Snell, GM/VP, Tabor Research; sponsored by Dell
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