HPCwire: Converging Design Features in CPUs and GPUs

The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing

HPCwire >> Features

January 19, 2007

Converging Design Features in CPUs and GPUs

by Matthew Papakipos, Founder and CTO, PeakStream Inc.

Page: 1 of 2
1 | 2 All »

As CPUs and graphics processors (GPUs) evolve, many of their design features are beginning to look remarkably similar, and as a result, many of today's most common workloads will soon have a choice about where to execute. Users have been told by all the major hardware providers to expect processors that feature increasingly non-uniform and complex memory hierarchies, rapidly increasing core (and thread) counts and the integration of specialized acceleration units. These new processor designs will not be friendly to legacy code bases optimized for single-threaded, uniform memory systems, or, for that matter, to programmers without the time or expertise to create tuned, processor specific code. If we want to fully utilize these new hardware designs, then something needs to change about the way we write software.

Of course, some of these changes have been more widely evangelized than others. Many people know the history of multi-core on the CPU. When AMD shipped its first dual-core processor, multi-core processors really broke through into the commodity processor market. AMD was also first to incorporate both the memory interface logic and processor interconnect interface logic on the processor chip itself. And now Intel has shipped its first quad-core processors, as AMD is expected to do next year.

But what has happened to core count so far is merely the prologue to an imminent drastic increase in core counts. At the Intel Developer Forum 2006, for example, Intel showed off "Polaris", a prototype processor with 80 cores, each with its own local, programmer-managed memory and with a fast on-chip interconnect. A wave of discussions ensued on numerous developer forums about whether the design was the best approach, but practically everyone agreed that there would be no easy way to program it.

In fact, industry pundits are predicting the solution to programming issues will be the next big software remediation effort as Moore's Law is realized by the doubling of the number of cores on a chip approximately every 18 months through 2015. According to Gartner Research vice president Carl Claunch, "If your software runs as a monolith, a single thread, you need to re-architect it to be parallel, otherwise the workload will not be capable of accessing the additional performance delivered with each new generation of systems." Unfortunately, a majority of programmers are not sufficiently skilled to make applications multithreaded, yet the relentless doubling every 18 months will demand higher and higher levels of concurrency over time.

In another set of announcements, AMD has been talking up its "Torrenza" initiative. According to AMD, future CPUs won't be composed of homogeneous cores -- there will simply be too many cores for useful work -- but instead some of that chip area will be devoted to specialized accelerators. The first fruit of this approach will be the "Fusion" processor, an integrated CPU/GPU available sometime around the 2008 timeframe.

The GPU Design Evolution

Strangely enough, there are companies who already have lots of experience designing highly multi-core processors and enabling the software to take advantage of them: the GPU providers. GPUs have had massively multi-core designs for quite some time. The ATI R580 processor has 48 processing cores, while the just-shipped G80 from NVIDIA has an astonishing 128 processors. The GPU also has a history of adding accelerators for specialized functions, such as line-of-sight calculation.

Many people are familiar with the astonishing raw number-crunching potential of the GPU -- the NVIDIA G80, for example, has half a teraflop of floating point capacity (for about $600) -- but fewer are familiar with the other evolution in GPU designs. The GPU used to be a relatively inflexible, semi-fixed function processor, but the latest generation of GPUs, driven by Microsoft's DirectX 10 requirements, are outgrowing their graphics legacy and becoming, for want of a better term, "high throughput processors."

With the new generation, (e.g., the NVIDIA G80), GPUs have added full dynamic flow control, integer support, full shared memory access, true scalar cores and multiple levels of non-uniform cache. Add to that the announcement by all GPU providers that double precision floating point is coming in the near future and you have a design that shares several striking features with Intel Polaris.

The Future of the Processor

Page: 1 of 2
1 | 2 All »

Article Tools

Share Options

(Digg, Technorati, more)

Subscribe

Subscribe to HPCwire

Discussion

There are 0 discussion items posted.

Join the Discussion

You must be a registered user in order to comment on HPCwire stories.

Members enjoy:

	Access to Special Content, including Podcasts, Webcasts, and Whitepapers and more!
	Ability to take an active role in the discussions that are shaping the HPC technology discipline!
	Special offers available only to HPCwire members!

Become a Registered User Today!

Registered Users Log in Here to Comment

Email Address:	Password (case sensitive)

Remember me	Forgot Password?

RSS Feeds

Feeds by Topic

Feeds by Industry

Feeds by Content Type

Top Headlines

Australia Commissions Cray Supercomputer

Mar 19 | OfficialWire | New super to support intelligence work Down Under. Read more...

Intel Partners See 'Easy' Upgrade Path With Xeon 5600 Chips

Mar 18 | ChannelWeb | Westmere parts already showing up in HPC machines. Read more...

AMD: OEMs primed for Opteron 6100s

Mar 17 | The Register | But what about the tier ones? Read more...

Arrival of the Desktop Supercomputer

Mar 17 | Cadalyst Magazine | A new generation of workstations is changing the nature of technical computing. Read more...

Scheduling HPC In The Cloud

Mar 17 | Linux Magazine | Latest iteration of Sun Grid Engine able to tap into Cloud. Read more...

Read more headlines...

Featured Whitepapers

Virtualization for Aggregation And The vSMP Architecture™

Jan 12 | | In-depth look at vSMP Foundation server virtualization technology, technical implementation, use cases and capabilities. The technical whitepaper provides an architectural overview and details on the three vSMP Foundation products: vSMP Foundation for SMP, vSMP Foundation for Cluster and vSMP Foundation for Cloud.

Copper Cable Technologies for High Performance Computing

Jan 18 | | This white paper discusses Gore’s copper cable assemblies, and how they continue to exceed the standards for providing reliable, cost-effective solutions for high-performance computer applications.

View the White Paper Library

Multimedia

Webcast: Virtualized Data Center Roundtable

Join this online panel discussion for live Q&A with leading industry experts, analysts, and end-users to discuss the latest innovations, best practices, barriers to implementation, and measurable benefits of server virtualization with a particular focus on today's real world solutions.

Webcast: Watch SC09 Birds of a Feather Video: Scalable Fault-Tolerant HPC Supercomputers

Learn about scalable fault-tolerant architectures and examples of energy efficient and scalable supercomputing clusters using dual QDR InfiniBand to combine capacity computing with network failover capabilities with the help of programming languages such as MPI and a robust Linux cluster management package.

Webcast: High Performance Computing for a Smarter Planet

LIVE@SCO9: The IBM team discusses new innovations in hardware, software and services that help clients better understand their workloads and get insight from their R&D efforts. Technology demonstrations include the soon-to-be-released Power7 HPC processor, the DCS990 system with 2.4 petabytes of storage, the xCAT management tool, secure HPC cloud computing and more. Winners of two HPCwire Readers' and Editors’ Choice Awards! Take the IBM virtual tour at SC09 or more information go online to: http://www-03.ibm.com/systems/deepcomputing/sc09.html