HPCwire: Intel Lifts the Curtain on Larrabee

The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing

HPCwire >> Features

August 04, 2008

Intel Lifts the Curtain on Larrabee

by Michael Feldman, HPCwire Editor

In a press briefing on Friday, Intel representatives revealed some of the architectural details of the company's much talked-about Larrabee processor. The new design is the chipmaker's first manycore x86 platform and represents what could be described as a general-purpose, x86 vector processor, combining features from both GPUs and CPUs. The architecture is the culmination of more than three years of R&D accomplished under Intel's terascale research program. The company will present a paper at the SIGGRAPH 2008 conference next week in Los Angeles, which will elaborate the design of the processor and its programming model.

The idea behind Larrabee was to jump to the front of the line in GPU programmability, while at the same time deliver an x86 vector processor that can be applied to a wide range of high throughput applications. The new architecture's applicability to visual computing is a result of its general suitability for HPC applications, rather than any GPU-specific capabilities. In fact, Intel characterizes Larrabee as a generic high throughput processor, rather than a GPU. Emphasizing Intel's intentions for the new architecture, Larry Seiler, senior principal engineer on the project said that "Larrabee is going to revolutionize graphics processing and supercomputing."

For the most part, Friday's briefing left out product plans for the new processor. Neither core count, clock speed, nor power consumption was mentioned, and product launch dates were only talked about in the general timeframe of "2009 or 2010." A lot of the discussion focused on Larrabee's role as a high-end GPU for the PC, its initial target market. By entering the high-end volume graphics space, Intel hopes to extend its strong position in the mobile GPU market to desktop gaming.

If it meets with success there, Intel is almost certain to push the platform into the HPC market, where its vector capabilities and x86 compatibility would make it an instant contender against other high-end accelerators like NVIDIA's Tesla products (and other CUDA-supported GPUs), AMD's FireStream GPU offering, Cell processor systems, ClearSpeed co-processors, and even FPGA accelerators. But in Larrabee's case, no external host processor will be required since CPU logic is already on the chip.

Unlike the typical GPU of today, Larrabee has a number of important differences. The overall layout of the chip consists of a number of x86 cores connected to each other via a high speed ring bus, 512 bits wide in each direction. The cores are derived from Intel's Pentium processor, with its short, in-order execution pipelines. In this case though, each core executes up to four threads at a time and contains both a scalar and a vector unit, with the latter able to execute 16 32-bit operations per clock tick. Since Larrabee is basically a CPU architecture, features like context switching, preemptive multitasking, virtual memory and page swapping are built in. And because thread management is done in software, latency can be hidden with conventional parallelization techniques.

Each core contains Level 1 instruction and data caches, with Level 2 cache provided on chip as well. L2 cache is shared between cores, with 256 KB allocated to each one. Unlike GPUs, cache coherency is maintained throughout the cache hierarchy, which enables a software friendly framework for inter-processor communication an efficient mechanism to share data between application threads. Memory controller (or controllers) are on-chip too, as well as application-specific fixed function units.

In general though, a Larrabee processor intended for graphics workload uses very little fixed function hardware. Almost all processing is intended to be performed with software on the x86 cores. In certain cases, notably the texture shader, Intel has added fixed function hardware to boost graphics performance. The rationalization for a mostly graphics software pipeline is that requirements for various functional units (vertex shading, rasterization, pixel shading, etc.) can vary quite a bit from application to application. So workload balancing will be easier to achieve with general-purpose silicon plus software, as opposed to dedicated hardware. That also means that application performance should scale more evenly as additional cores are placed on the die.

To even the playing field in the graphics space, Intel will support DirectX and OpenGL so that existing applications can be ported more easily. A Larrabee-specific API will also be provided for more adventurous programmers who are interested in taking advantage of the full capabilities of the processor. Access to the vector instruction set, which has yet to be described, will be available via C language intrinsics. The vector unit will support IEEE single and double precision floating point operations as well as 32-bit integers.

Even though Larrabee is being characterized as a manycore chip, the first versions will probably have tens of core, rather than the hundreds of cores currently present in the NVIDIA and AMD (ATI) GPUs. Depending on clock speed, Larrabee's raw performance may even be less than that of traditional GPUs. For example, even with the impressive 16 single precision operations per clock (per core), a 1.0 GHz Larrabee chip would need 62 cores to equal the performance of the latest teraflop GPUs from NVIDIA and AMD that will ship this year. Presumably Intel will find the formula to at least match the performance of the competition. But its claim of superior programmability may resonate more than raw performance, especially with software vendors who are looking for more flexibility in developing new types of applications, graphics or otherwise.

Introducing a new architecture into a mature market is always a risky proposition, which Intel itself learned from its Itanium adventure. But the chip vendor is a huge force in the industry and has more than a year to line up ISV and OEM support for Larrabee. Its success in the graphics space will likely determine if the processor becomes a commodity part for HPC. In a way, that's unfortunate, since Larrabee is probably a better fit overall for high-end technical computing than for the more narrow domain of visual computing. Either way, the competition among Intel, AMD and NVIDIA is bound to get more interesting.

Article Tools

Share Options

(Digg, Technorati, more)

Subscribe

Subscribe to HPCwire

Discussion

There are 0 discussion items posted.

Join the Discussion

You must be a registered user in order to comment on HPCwire stories.

Members enjoy:

	Access to Special Content, including Podcasts, Webcasts, and Whitepapers and more!
	Ability to take an active role in the discussions that are shaping the HPC technology discipline!
	Special offers available only to HPCwire members!

Become a Registered User Today!

Registered Users Log in Here to Comment

Email Address:	Password (case sensitive)

Remember me	Forgot Password?

RSS Feeds

Feeds by Topic

Feeds by Industry

Feeds by Content Type

Top Headlines

AMD: OEMs primed for Opteron 6100s

Mar 17 | The Register | But what about the tier ones? Read more...

Arrival of the Desktop Supercomputer

Mar 17 | Cadalyst Magazine | A new generation of workstations is changing the nature of technical computing. Read more...

Scheduling HPC In The Cloud

Mar 17 | Linux Magazine | Latest iteration of Sun Grid Engine able to tap into Cloud. Read more...

Tailoring Medicine with Supercomputers

Mar 16 | Bio-IT World | Biotech firm builds genetic models from patient data. Read more...

Gelsinger Stuns Analysts and Colleagues with Storage Pool Plan

Mar 15 | The Register | EMC's grand vision for unified global storage. Read more...

Read more headlines...

Featured Whitepapers

Virtualization for Aggregation And The vSMP Architecture™

Jan 12 | | In-depth look at vSMP Foundation server virtualization technology, technical implementation, use cases and capabilities. The technical whitepaper provides an architectural overview and details on the three vSMP Foundation products: vSMP Foundation for SMP, vSMP Foundation for Cluster and vSMP Foundation for Cloud.

Copper Cable Technologies for High Performance Computing

Jan 18 | | This white paper discusses Gore’s copper cable assemblies, and how they continue to exceed the standards for providing reliable, cost-effective solutions for high-performance computer applications.

View the White Paper Library

Multimedia

Webcast: Virtualized Data Center Roundtable

Join this online panel discussion for live Q&A with leading industry experts, analysts, and end-users to discuss the latest innovations, best practices, barriers to implementation, and measurable benefits of server virtualization with a particular focus on today's real world solutions.

Webcast: Watch SC09 Birds of a Feather Video: Scalable Fault-Tolerant HPC Supercomputers

Learn about scalable fault-tolerant architectures and examples of energy efficient and scalable supercomputing clusters using dual QDR InfiniBand to combine capacity computing with network failover capabilities with the help of programming languages such as MPI and a robust Linux cluster management package.

Webcast: High Performance Computing for a Smarter Planet

LIVE@SCO9: The IBM team discusses new innovations in hardware, software and services that help clients better understand their workloads and get insight from their R&D efforts. Technology demonstrations include the soon-to-be-released Power7 HPC processor, the DCS990 system with 2.4 petabytes of storage, the xCAT management tool, secure HPC cloud computing and more. Winners of two HPCwire Readers' and Editors’ Choice Awards! Take the IBM virtual tour at SC09 or more information go online to: http://www-03.ibm.com/systems/deepcomputing/sc09.html