HPCwire: Ubiquitous Parallelism and the Classroom

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November 20, 2009

Ubiquitous Parallelism and the Classroom

by Tom Murphy of Contra Costa College, Paul Gray of the University of Northern Iowa, Charlie Peck of Earlham College, and Dave Joiner of Kean University

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The oft-contended best simple statement is that we need ubiquitous parallelism in the classroom. Once upon a time, it was solely the lunatic fringe, programming esoteric architectures squirreled away in very special corners of the globe that cared about parallelism. In the near future, most electronic devices will have multiple cores which would benefit greatly from parallel programming. The low hanging fruit is, of course, the student's laptop, and aiding the student to make full use of that laptop.

So how do we get there?

Our perception of next steps comes from close to a decade of collaboration pushing parallel and distributed computing education. This doesn't mean we are right, just that we have been walking the walk. Three of the four of us are computer scientists and Dave, our physicist, is essentially also one (of course he claims that we're all physicists). The bulk of our time together, outside of our respective day jobs teaching, is spent leading week-long workshops for faculty -- largely focused on the teaching of parallel and distributed programming and computational thinking. Our assertion is this: As computer architectures evolve from single core to multicore to manycore, the computer science curriculum must experience a commensurate single-course to multi-course to many-course evolution in terms of where parallelism is studied.

Thus, you're probably not surprised we're saying faculty education is the key way to get from here to there, using as many modes of conveyance as possible. For teaching parallelism in our courses, few of us CS educators have learned what we have needed from our own formal education. We possess a self-taught science/art crafted via the hands-on hard-knock cycles of design, debugging, and despair which provided us with rich learning opportunities. This highlights the goals we have for our students: theory tightly coupled with the pragmatic skills of the practiced practitioner, learned via the cycles of design, debugging, and despair. Note that performance programming is wonderfully resurfacing in importance, for if you don't need performance, why bother with the complexity of a parallel solution? Just run on your friendly neighborhood SMP or NUMA architecture, which will suffice as a first order solution for many problems. It was performance parallel programming that put the 'L' in lunatic fringe, and to raise 'L', we will ultimately need to examine the isolated graduate and undergraduate courses and weave the key components of parallelism into the fabric of all computer science courses beginning at the earliest level.

So let's get specific on possibilities for the first courses at the undergraduate level. The core of CS1 typically starts with the nomenclature, theory, and components of a simple algorithm and a basic block of execution. Flow of control is our next extension: branches, loops, and functions. Parallelism is easily a natural next layer. When we invoke parallelism, we might demonstrate by conjuring with threads and shared memory, since the use of shared memory will not perturb the student's simple notion of array-like memory. Additionally, the most frequently used shared memory mechanism, OpenMP, allows a gradual move from pure von-Neumann towards "pure" shared memory parallelism. This will cover fine-grain parallelism. A hunger for a different course of studies leads to the course-grained approach of distributed memory parallelism with MPI. Larger scale parallelism is naturally necessarily discovered by students as the problems of interest continue to grow.

The legal battlefield of Amdahl and Gustafson is a good next stop, guiding us into the study of data structures and algorithms via a perilous path littered with algorithms which scale poorly. Unchecked and unplanned parallelism will lead us to throttled resources whether Von Neumann's bottleneck or the more insidious communication costs incurred when trying to tame a parallel algorithm. Students can learn of dwarvish parallel patterns and associated phenomena such as a sequentially elegant quicksort quickly foundering in the presence of unamortized distributed memory costs.

This is a good time to consider how to squeeze weeks and weeks of new material on parallelism into a semester. Something has to give and something will give, but this is not a new dilemma. It is something we each faced when first crafting what we will cover in a course. It is something we face to a greater or lesser extent every time we re-teach a course given the pace of change in our discipline.

Now it is time for an anecdote. Tom interviewed Dave Paterson as part of the "Teach Parallel" series of interviews. The interview ranged over many topics, one of which was Dave's fourth edition of "Computer Organization and Design", which gloriously has parallel topics woven into each chapter. This led to talking with Dave's publisher about targeting an adaptation of the book towards community colleges, such as Contra Costa College where Tom teaches. The publisher was surprised to learn no dilution of the 703 pages was desired. Tom plans to cherry pick the material to use in his Computer Architecture course, which is a continuation of an experiment he's been running in all his courses, which allows the entire book is covered, just at varying depths. It is important for Tom to convey how to be a good student, part of which is being able to self-learn from practitioners' resources. This raises a good point: more textbook support for parallelism is going to make this whole process a heck of a lot easier. Unfortunately, it takes awhile to prime the curricular pump.

Computer architecture has traditionally incorporated elements of parallelism and concurrency; via semaphores and atomic operations, pipelines and multiple functional units, SMP architectures, and instruction and data paths. It has always been the place where the key hardware issues of the current architectures inform the software designed to run on it.

There are no easy answers, but there really are clear steps. We need to help students get to a place where they think of a single processing unit as just a special case of multiple processing units, much like they now learn to view a single variable as a special case of an array.

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