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Blog: From the Editor

From the Editor | Main Blog Index

Closing In On Petaflops


The HPC community has been reaching towards systems capable of petaflops performance ever since the teraflops barrier was conquered back in December of 1996. Today systems that will execute a quadrillion floating point operations per second are close to becoming a reality. In fact, one such system may already exist. While HPC people-in-the-know realize that it's just a number, the petaflops metric does seem to capture the imagination of the public whenever it's mentioned in the media. So I'm mentioning it.

And I'm not the only one. Just this last week, EETimes reported that Riken, a Japanese government-funded science and technology research organization, has a developed a supercomputer that achieves a theoretical peak performance of one petaflops. The system, called MDGrape-3, was apparently designed as a dedicated computing system to run molecular dynamics simulations. The details of the hardware are a little sketchy, but basically it looks like a very large cluster of Intel Xeon based-servers with some additional proprietary MDGrape-3 processors thrown into the mix.

Peter Ungaro, CEO of Cray, told me that has some familiarity with the MDGrape technology and he believes the Riken claim is probably true (although the Japanese team at Riken admit that they haven't run Linpack on the system so no direct comparison with other benchmarked machines can be made). Ungaro also reminded me that the Japanese machine was specifically built to run one type of application, so it really shouldn't be compared with more general-purpose supercomputers.

Like, for instance, Cray machines. The Seattle supercomputer company made its own peta-splash late last week, when it announced that it will deliver a petaflops-speed computer to Oak Ridge National Laboratory (ORNL) in late 2008. In a conversation I had with Jan Silverman, Cray's senior VP of Corporate Strategy and Business Development, he described the significance of the ORNL machine and how it will fit into the company's future product line. And although we talked about the peak petaflops milestone, that particular attribute of the system seemed much less important than what the new machine represents to both Cray and ORNL. Read the article in this week's issue for the complete story.

And Cray is not the only one playing in the deep end of the pool this summer. IBM and the National Nuclear Security Administration (NNSA) claimed a new world record for a scientific application by achieving a sustained performance of 207.3 teraflops. IBM and NNSA have managed to scale the "Qbox" code so that it can take better advantage of the 131,072 PowerPC processors in the Blue Gene/L system at Lawrence Livermore National Laboratory. Qbox is an application used to conduct materials science simulations critical to national security.

"This is an important step on the path to performing predictive simulations of nuclear weapons, and these simulations are vital to ensuring the safety and reliability of our nuclear weapons stockpile." said Dimitri Kusnezov, head of NNSA's ASC Program. For more about the ASC program, read our own interview with Kusnezov in this week's issue.

The IBM Blue Gene/L record of 207.3 sustained teraflops record is only a fifth of the way to a sustained petaflops. But this is the metric that really matters -- sustained performance on real live applications. Achieving this level of capability will require a more advanced hardware/software model than that required for peak performance alone.

Our own High-End Crusader(HEC) tackles this issue himself in this week's feature article, "Heterogeneous Processing Needs Software Revolutions." It's a long read, but I encourage anyone interested in the future of HPC system software to take a look. HEC argues that a much more sophisticated approach to thread migration will be required for our next-generation heterogeneous supercomputers. Be forewarned -- HEC is not pulling his punches with this one. Here's just a slice of what's inside:

"Perhaps the U.S. has such expertise in principle, but it clearly has not yet worked the issues of developing system software to manage, operate, and exploit next-generation heterogeneous systems. More generally, in the area of heterogeneous processing for high-end computing, there is a total absence of leadership---from vendors, from academia, from government. Whether we consider heterogeneous system architectures, hardware technology, language processing, etc., etc., there are no private-sector computer architects or government agencies who either can, or are willing to, assume a leadership role; there are no compelling visions of heterogeneous processing from which to choose. We are lacking even a simple roadmap for heterogeneous processing."

Conference News

Last week's first annual TeraGrid Conference in Indianapolis offered up some great presentations from individuals who are interested in building and using cyberinfrastructure. Check out our special section of the TeraGrid 2006 Conference in this week's issue, right beneath our Features section. You'll find additional coverage of the event in this Monday's issue of GRIDtoday. And for even more information about the conference, visit http://www.teragrid.org/events/2006conference/, where you can download the individual presentations.

It seems like as soon as one HPC conference ends, another one begins. Next week, on June 27-30, the 21st Annual International Supercomputing Conference (ISC) is taking place in Dresden, Germany. ISC is the premier supercomputing conference in Europe and provides an international forum for the global HPC community. This year, we'll be providing special coverage of the event featuring interviews, articles, news and commentary. Visit our live coverage at http://www.hpcwire.com/ starting on June 28.

-----

As always, comments about HPCwire are welcomed and encouraged. Write to me, Michael Feldman, at editor@hpcwire.com.

Posted by Michael Feldman - June 22, 2006 @ 9:00 PM, Pacific Daylight Time

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Michael Feldman

Michael Feldman

Michael Feldman is the editor of HPCwire.

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