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November 09, 2007
Because of the volume of news in this, the week before SC, I've shortened the entries somewhat in an attempt to keep this summary shorter than book 7 of the Harry Potter series. You can always find more detail by following the links for each story.
As always, I present a collection of highlights, selected totally subjectively, from this week's HPC news stream as reported at insideHPC.com and HPCwire.
>>10 words and a link
IBM fails to ship Barcelona systems, benchmark results labeled "non-compliant;
HPC startup SiCortex announces deskside supercomputer;
Intel announces revved multicore development products, compilers;
Terascala intros new Lustre-based storage device;
NSF awards NCSA $18M;
Purdue named NSF HPC center;
New Mexico makes investment in 172 TFLOP SGI;
Evergrid readies novel load management solutions;
>>Cray announces XT5 line of supers
Cray announced the latest installment in the XT series of scalable supercomputers, the XT5 family. The new Cray XT5 massively parallel processor (MPP) system incorporates a new compute blade that will quadruple local memory capacity, double processor density and improve energy efficiency. The XT5 family also includes the first hybrid supercomputer, the XT5h, with support for vector and FPGA blades alongside the Opteron blades in a single system fabric. More at http://insidehpc.com/2007/11/06/cray-announces-xt5-series-supercomputers/, and elsewhere in this edition of HPCwire.
>>HP announces Accelerator and Multi-Core Optimization programs
HP has announced two new HPC performance programs. The new HPC Accelerator program gives accelerator vendors a path to qualify their offerings with ProLiant and BladeSystem hardware. Current partners include ClearSpeed, Celoxica, NVIDIA, AMD, RapidMind and Mitrionics.
The Multi-Core Optimization Program (MCOP) was announced in June, and has been expanded. From the press release (http://www.hp.com/hpinfo/newsroom/press/2007/071101a.html):
The program brings together developments from HP and its partners to provide open, non-proprietary solutions that enhance multi-core performance across a variety of industry-standard HPC architectures, platforms and operating environments. By optimizing multi-core solutions, customers can maximize application performance on multi-core systems, enabling larger simulations and more data analysis that is necessary to achieve their engineering, science and analytical goals.
New members of the program include: Allinea, Interactive Supercomputing, The Portland Group, RapidMind, Stanford Pervasive Parallelism Lab and Visual Numerics.
More information on both programs at http://insidehpc.com/2007/11/05/hps-accelerator-and-multicore-optimization-programs/.
>>RapidMind revs multicore development platform
RapidMind announced this week that they've released version 3.0 of their Multi-core Development Platform, an application development suite designed to help coders get the most performance out of multicore platforms from Intel and AMD as well as GPGPUs and the Cell.
>>Allinea's DDT available on the XT
This week they've announced that their flagship parallel debugging tool, the Distributed Debugging Tool (DDT), is now available for the Cray XT4 and 5.
>>TotalView previews reverse debugging
TotalView announced this week they'll be previewing "reverse debugging" at SC07 next week. The press release (http://www.totalviewtech.com/press_release.htm?id=90) states that the new reverse debugging features will allow developers to:
- Capture and replay the exact behavior of the program from any point in the past during a single debugging session.
- Step backward from crashes and out of functions to see what went wrong.
- Jump forward and backward to examine and compare any set of points along the captured execution sequence.
- Replay thread context switches exactly as they happened.
- Seamlessly and clearly switch between record mode and replay mode.
Jun 19, 2013 |
Supercomputer architectures have evolved considerably over the last 20 years, particularly in the number of processors that are linked together. One aspect of HPC architecture that hasn't changed is the MPI programming model.
Jun 18, 2013 |
The world's largest supercomputers, like Tianhe-2, are great at traditional, compute-intensive HPC workloads, such as simulating atomic decay or modeling tornados. But data-intensive applications--such as mining big data sets for connections--is a different sort of workload, and runs best on a different sort of computer.
Jun 18, 2013 |
Researchers are finding innovative uses for Gordon, the 285 teraflop supercomputer housed at the San Diego Supercomputer Center (SDSC) that has a unique Flash-based storage system. Since going online, researchers have put the incredibly fast I/O to use on a wide variety of workloads, ranging from chemistry to political science.
Jun 17, 2013 |
The advent of low-power mobile processors and cloud delivery models is changing the economics of computing. But just as an economy car is good at different things than a full size truck, an HPC workload still has certain computing demands that neither the fastest smartphone nor the most elastic cloud cluster can fulfill.
Jun 14, 2013 |
For all the progress we've made in IT over the last 50 years, there's one area of life that has steadfastly eluded the grasp of computers: understanding human language. Now, researchers at the Texas Advanced Computing Center (TACC) are utilizing a Hadoop cluster on its Longhorn supercomputer to move the state of the art of language processing a little bit further.
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
Join HPCwire Editor Nicole Hemsoth and Dr. David Bader from Georgia Tech as they take center stage on opening night at Atlanta's first Big Data Kick Off Week, filmed in front of a live audience. Nicole and David look at the evolution of HPC, today's big data challenges, discuss real world solutions, and reveal their predictions. Exactly what does the future holds for HPC?
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