Visit additional Tabor Communication Publications
March 21, 2008
This week Intel and Microsoft announced their intention to fund two new university-based research centers focused on transforming the way programmers make use of multicore chips, and in the process enabling a whole new class of applications. The companies are optimistic that this effort will form the core of a radical transformation in the ways we use technology. All of this goodness will come from new ways to do something we've been focused on for the past 40 years: coercing more than one processing unit to work together to accomplish a single task.
The goal of the effort is to focus leading academic teams on the problem of effectively programming multicore processors. The research will focus on applications, architecture, and operating systems software as well as the software support infrastructure (compilers, languages, and so on) needed to express parallel work. An interesting aspect of this particular effort is that it brings together the leading hardware and software platforms in the market to look at the total solution.
In an interview with HPCwire Katherine Yelick, one of the principal investigators on the university team from UC Berkeley, said of the relationship, "This is one of the first times in my career when it actually feels like the major processor manufacturers might actually listen to people in terms of what they would like to make it easier to write parallel programs, or easier to get performance out of them."
As HPCwire readers you are probably focused on high performance technical computing, and possibly use, provision, or build computers with at least hundreds of sockets. The principals in this project were careful to emphasize that HPTC is not the focus of this effort, and you should not expect MPI 3.0 to rise out of one of the centers. The focus is on mainstream computing and applications. In fact that word, "mainstream," is repeated again and again in the official releases on the project.
The mainstream focus puts the emphasis on single-socket parallel programming. As Andrew Chien, vice president of the Corporate Technology Group and the director of Intel Research, said during the teleconference "a lot of the focus around how you deliver the promise of parallelism to a broad array of platforms in everything from servers down to laptops and small mobile devices is a lot about single socket parallelism, and that really is the primary focus of the UPCRC program."
I would expect that the research developed by these centers will spur advancements in HPTC -- after all, we're all using the same chips, and some of the issues one faces in coordinating work among 100 cores on a single chip come up again when you connect 100 such chips together. In response to a question asked by the Seattle Post Intelligencer on Tuesday about who would own intellectual property rights to the products of research from the two universities, both Microsoft and Intel emphasized their commitment to open-sourcing the results, so the HPTC community should have access to a lot of this research as it develops.
The plan announced on Tuesday will devote $10 million from Intel and Microsoft to each of two Universal Parallel Computer Research Centers (UPCRC); a total investment of $20 million over 5 years. The centers were selected out of a pool of 25 universities in a competitive process, and both awardees have a long history of IT innovation.
The first center, to be housed at the University of California at Berkeley, will be headed up by David Patterson, one of the authors of The Landscape of Parallel Computing: A View from Berkeley, and one of the pioneers of RISC and RAID. The second center will be led by Marc Snir and Wen-mei W. Hwu at the University of Illinois at Urbana-Champaign. Snir is former head of the department of computer science at UIUC and leader/initiator of the IBM Blue Gene project while at TJ Watson before that. Hwu is the current chair of ECE at UIUC and director of the OpenIMPACT project. Both universities are adding their own funds to the effort, with UIUC chipping in $8 million. UC Berkeley has applied for $7 million from the state of California.
Yelick outlined the focus of the UC center along software, architecture, operating systems, and correctness problems. The software work is focused in two different layers, "...what we call the productivity layer, which we think is for most programmers to use, and an efficiency layer, which is for the parallelism and performance experts." The productivity layer will use abstractions to hide much of the complexity of parallel programming, while the efficiency layer will let experts get at the details for maximum performance. During the teleconference Patterson broke these two audiences more colorfully into the "programming masses" and "ninja programmers."
Snir indicated that the software portion of the UIUC center's focus will be much more on the programming masses. As he put it during the teleconference, the goal for this effort is to "make 'parallel programming' synonymous with 'programming'."
At $20 million this project is billed by the participants as the "first joint industry and university research alliance of this magnitude in the United States focused on mainstream parallel computing." Fair enough. But relative to the scale of the problem they're trying to solve, and to the scale of the potential markets they hope to tap, the investment seems small to me. On the other hand the technology industry, and especially the information technology industry, has a history of making big advancements from small projects. The several million dollars invested in ARPANET in the late 1960s is roughly equivalent to $20 million today, and by most accounts that investment paid off pretty well.
John Markoff, writing in the New York Times on Wednesday, said that executives from Intel and Microsoft told him that this research was a step toward filling the funding void created by DARPA when it started shifting its funding away from universities and toward military and classified projects beginning in 2001. Dan Reed, director of scalable and multicore computing at Microsoft and who, along with Andrew Chien from Intel, will help manage the two centers for Intel and Microsoft, is quoted in that article as saying "The academic community has never really recovered from DARPA's [sic] withdrawal."
While it's hard to argue that any step toward closing the science funding gap is a bad step, this is really just a drop in a very large empty bucket. Peter Harsha of Computing Research Association, writing at the CRA's Policy Blog also on Wednesday, puts the decline in DARPA funding to universities at $91 million a year in unadjusted dollars between 2001 and 2004, with anecdotal indications that the gap has widened in the years since 2004.
The goal of the UPCRC project is ambitious, and as one would expect the language around the announcement of the initiative was full of hope and hype. Intel's Andrew Chien said that this effort is expected to "help catalyze the long-term breakthroughs that are needed to enable dramatic new applications." A similarly enthused Tony Hey, corporate vice president of External Research at Microsoft Research said that they "plan to explore the next generation of hardware and software to unlock the promise and the power of parallel computing and enable a change in the way people use technology." Heady stuff.
We can forgive some of the hype as necessary to get attention in an increasingly target rich news feed. And we shouldn't forget that computers have indeed dramatically transformed how we work and play, at least in the Western world. But, really. Let's all take a deep breath and get to work rather than tossing love balloons into the air about how technology will finally lift us from the drudgery of the human condition and install us once and for all in a permanent state of joy.
May 22, 2013 |
At some point in the not-too-distant future, building powerful, miniature computing systems will be considered a hobby for high schoolers, just as robotics or even Lego-building are today. That could be made possible through recent advancements made with the Raspberry Pi computers.
May 16, 2013 |
When it comes to cloud, long distances mean unacceptably high latencies. Researchers from the University of Bonn in Germany examined those latency issues of doing CFD modeling in the cloud by utilizing a common CFD and its utilization in HPC instance types including both CPU and GPU cores of Amazon EC2.
May 15, 2013 |
Supercomputers at the Department of Energy’s National Energy Research Scientific Computing Center (NERSC) have worked on important computational problems such as collapse of the atomic state, the optimization of chemical catalysts, and now modeling popping bubbles.
May 10, 2013 |
Program provides cash awards up to $10,000 for the best open-source end-user applications deployed on 100G network.
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
In this demonstration of SGI DMF ZeroWatt disk solution, Dr. Eng Lim Goh, SGI CTO, discusses a function of SGI DMF software to reduce costs and power consumption in an exascale (Big Data) storage datacenter.
The Cray CS300-AC cluster supercomputer offers energy efficient, air-cooled design based on modular, industry-standard platforms featuring the latest processor and network technologies and a wide range of datacenter cooling requirements.