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July 01, 2008
On Monday, an article in CNews, a Russian IT publication, reported that 100 servers based on the home-grown Elbrus-3M microprocessor would be delivered to its "customers" later this year. The article stated that 0.6 teraflop systems will be built from the Elbrus-3M servers and characterized the new machines as "entry level supercomputers." According to CNews, the computers are slated to be used for anti-missile and air defense, as well as in cryptographic calculations for secret services.
The Russian-built Elbrus chips and computer line of the same name have an interesting history. The development effort was originally a state-sponsored project, which was initiated in the 1970s to develop Soviet supercomputers. In 1992, following the fall of communism, development of the architecture continued under the Moscow Center of SPARC Technologies (MCST), an organization which retained backing from the Russian government. The Elbrus processors, at least the early renditions, were compatible with the SPARC architecture.
At one point, the company was developing the E2K processor, the Russian "Itanium killer," apparently at a time when people thought the Itanium needed killing. Alas, the E2K never made it out of the lab. The successor to the E2K (if vaporware can have a successor) was the Elbrus-3M, the processor mentioned in Monday's article.
The CNews piece apparently derived much of the story from MCST Director General Alexander Kim and lead developer Boris Babayan, who at one time was the chief technology officer of MCST. An interesting twist is that in 2004, Intel hired both Boris Babayan, and Alexander Kim, along with about 500 engineers and other MCST staff. Apparently, Babayan and Kim are still connected with the Elbrus work, irrespective of their day jobs at Intel.
Kim said the processor’s main advantages are its compatibility with the x86 architecture, its superscalarity (it allows processing up to 23 instruction at a time) and the extremely low power demand of 0.4 Watt/Gigaflops. The engineers say when processing real instructions Elbrus proves a productivity level close to peak performance. During matrix multiplication Elbrus-3M demonstrates 4.7 Gigaflops – 98% of the 4.8 peak performance.
Not bad for a 130nm processor, especially the 2.5 gigaflops/watt metric -- although based on the Elbrus Wikipedia entry, I'm fairly sure they're talking 32-bit floating point precision here. Kim said MCST's future plans call for an 8 gigaflop Elbrus-1C (at 90nm) in 2009; a 64 gigaflop Elbrus-4C (at 65nm) in 2012, and a 1 teraflop Elbrus-16C (at 32nm) in 2018.
That roadmap leaves them pretty far behind the processors planned by Intel, AMD, IBM, Sun Microsystems and just about any other chip vendor on the planet. In particular, if all goes according to schedule, an Intel "Larrabee" processor will probably hit 1 teraflop on 32nm technology as early as 2010. Apparently, that's not enough of a disincentive to drop the Elbrus plans. Considering Russia's love-hate relationship with the West, I guess the government wants to make sure it's got some chips it can call its own.
Posted by Michael Feldman - June 30, 2008 @ 9:00 PM, Pacific Daylight Time
Michael Feldman is the editor of HPCwire.
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