Visit additional Tabor Communication Publications
July 02, 2008
As Intel continues to flesh out its multicore processor roadmap, Anwar Ghuloum, principal engineer with the company's Microprocessor Technology Lab, is already encouraging software developers to begin designing applications for manycore processors -- architectures that contain tens, hundreds or thousands of cores. In his latest blog entry titled "Unwelcome Advice," he makes the case that designing apps for multicore processors is somewhat of a dead end.
If you're a mainstream programmer, you might think this puzzling. The current crop of IA processors sports 2 to 4 cores and Intel's next generation Nehalem processors, due out later this year, will support between 2 and 8. Larrabee, Intel's first manycore processor family, is a couple of years down the road, and its programming guide is still under wraps. So why commit to manycore when you're struggling to slice up your application into enough threads to give the current cores something to do?
Ghuloum's point is that manycore architecture will emerge as the enduring model in the industry, implying that the transition from "multi" to "many" will happen rather quickly. "Eventually, developers realize that the end point is on the other side of a mountain of silicon innovations," he writes. The downside, Ghuloum admits, is that designing an application for manycore is a much bigger undertaking than doing a multicore port.
The latter usually involves just breaking an application into well-defined tasks that can run concurrently. In some cases, this design may naturally be teased out of the existing code framework, where the application's major functions can be logically mapped to independent threads. A trivial example is a transactional app that inputs a data item, processes it, and outputs the transformed result -- and does this over and over. Turning this from a sequential app into one with three threads (Input, Process, Output) that carry out the tasks in parallel is often fairly straightforward. But since the application is now mapped to three cores, taking advantage of a platform with a different core count involves another dive into the application. Not only that, but for most applications there is no clear functional decomposition that can get you to tens or hundreds of cores.
Long-term scalability is easier to achieve with a manycore design mindset up front, since you're forced to deal with the built-in assumption that the ultimate number of cores is not just large, but variable. Ghuloum admits this "usually requires at least some degree of going back to the algorithmic drawing board and rethinking some of the core methods they implement." He continues (and here's the really Unwelcome Advice part): "This also presents the 'opportunity' for a major refactoring of their code base, including changes in languages, libraries, and engineering methodologies and conventions they’ve adhered to for (often) most of the their software’s existence."
Ghuloum kind of glosses over how this might actually be accomplished, but in previous blog entries he has written more extensively about Intel's adventures in fine-grained parallelism and terascale computing in general. In particular, back in January, he wrote about the company's new Ct language, a C/C++ derivative, and offered some detail about how it supports manycore architectures. In a nutshell, Ct supports both data and task parallelism and is designed to tackle fine-grained parallelism in a more generalized way than is currently being done with GPGPU environments like NVIDIA's CUDA or AMD's Brooks+. The Ct runtime insulates the programmer from the underlying hardware, creating and dispatching threads as needed.
Whether anyone will heed Ghuloum's Unwelcome Advice remains to be seen. He correctly notes that the HPC crowd is already on board with the idea of automatic application scaling, but the rest of the industry may be a harder sell. It's hard to imagine that many (non-HPC) legacy codes will migrate to manycore; a lot just don't contain enough inherent parallelism to make the trip worthwhile.
The real potential for manycore architectures and software environments like Ct is that they will provide a platform for much more intelligent (and thus valuable) types of software than exist today -- applications like image-based data miners, personal health agents, and real-time market trade analyzers. (I wrote about how Intel views this application space last year.) If developers see clear monetary opportunities in manycore applications, all advice will be welcomed.
Posted by Michael Feldman - July 01, 2008 @ 9:00 PM, Pacific Daylight Time
Michael Feldman is the editor of HPCwire.
No Recent Blog Comments
In quieter times, sounding the bell of funding big science with big systems tends to resonate further than when ears are already burning with sour economic and national security news. For exascale's future, however, the time could be ripe to instill some sense of urgency....
In a recent solicitation, the NSF laid out needs for furthering its scientific and engineering infrastructure with new tools to go beyond top performance, Having already delivered systems like Stampede and Blue Waters, they're turning an eye to solving data-intensive challenges. We spoke with the agency's Irene Qualters and Barry Schneider about..
Large-scale, worldwide scientific initiatives rely on some cloud-based system to both coordinate efforts and manage computational efforts at peak times that cannot be contained within the combined in-house HPC resources. Last week at Google I/O, Brookhaven National Lab’s Sergey Panitkin discussed the role of the Google Compute Engine in providing computational support to ATLAS, a detector of high-energy particles at the Large Hadron Collider (LHC).
May 23, 2013 |
The study of climate change is one of those scientific problems where it is almost essential to model the entire Earth to attain accurate results and make worthwhile predictions. In an attempt to make climate science more accessible to smaller research facilities, NASA introduced what they call ‘Climate in a Box,’ a system they note acts as a desktop supercomputer.
May 22, 2013 |
At some point in the not-too-distant future, building powerful, miniature computing systems will be considered a hobby for high schoolers, just as robotics or even Lego-building are today. That could be made possible through recent advancements made with the Raspberry Pi computers.
May 16, 2013 |
When it comes to cloud, long distances mean unacceptably high latencies. Researchers from the University of Bonn in Germany examined those latency issues of doing CFD modeling in the cloud by utilizing a common CFD and its utilization in HPC instance types including both CPU and GPU cores of Amazon EC2.
May 15, 2013 |
Supercomputers at the Department of Energy’s National Energy Research Scientific Computing Center (NERSC) have worked on important computational problems such as collapse of the atomic state, the optimization of chemical catalysts, and now modeling popping bubbles.
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
In this demonstration of SGI DMF ZeroWatt disk solution, Dr. Eng Lim Goh, SGI CTO, discusses a function of SGI DMF software to reduce costs and power consumption in an exascale (Big Data) storage datacenter.
The Cray CS300-AC cluster supercomputer offers energy efficient, air-cooled design based on modular, industry-standard platforms featuring the latest processor and network technologies and a wide range of datacenter cooling requirements.