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April 09, 2009
Everyone is talking up "green computing" these days, to the point where it's become background noise that pervades all of IT marketing. But it would be hard to find a truly greener story than the one SiCortex has been pitching since it debuted its power-sipping HPC machines in 2006. The company's Linux clusters are purpose-built for high performance computing, and deliver one of the best -- if not the best -- performance-per-watt experiences in the industry.
Unlike your typical teraflop machines, SiCortex systems are built using home-grown MIPS system-on-a-chip (SoC) hardware with an integrated communication fabric to tie the processors together. The general philosophy is to use larger numbers of slower processors to achieve a better balance between compute, memory and I/O performance. The result is that these machines deliver compute cycles with just a fraction of the power consumption of a vanilla x86 commodity cluster. In fact, the SiCortex hardware is on par with the energy efficiency of the new IBM Blue Gene/P supercomputers -- not too surprising when you consider both architectures use low-power SoC designs and proprietary system interconnects to achieve highly-streamlined HPC.
It looks like SiCortex's obsession with energy efficiency is starting to pay off. After a couple of years of gathering critical acclaim, it's now gathering sales. SiCortex added ten new customers in just the first three months of 2009, capping off record revenue growth in back-to-back quarters. Of course, SiCortex only recently started making headway revenue-wise, so record quarters would be expected. But SiCortex VP of Marketing Mark Blessing feels the company's message is now resonating with the community, adding that they are looking at "an extremely strong pipeline" for the rest of the year.
That's pretty remarkable news, given the lethargic state of the HPC sever market right now. With the recent demise of SGI, Sun Microsystems in limbo, and other HPC system vendors feeling the squeeze, most HPC system vendors would probably just like to fast-forward to 2010. Not SiCortex. 2009 might end up being a breakout year as more users look at reducing energy costs and carbon emissions as top priorities. And with its focus on government labs, higher education, and the defense/intelligence, the company has conveniently targeted three sectors that stand to weather the economic downturn reasonably well.
But it won't necessarily be smooth sailing. With all HPC vendors now shipping systems with the latest quad-core x86 chips, energy efficiency is improving all around. The recently-released Nehalem EP processors, in particular, are promising significantly better performance than the previous generation Harpertown chips, all within the same power envelope. Intel is claiming a 2X performance increase on some HPC benchmarks, like LS-Dyna crash simulations and Fluent CFD.
The team at SiCortex thinks Intel is overstating its case, however. According the Jud Leonard, chief architect at SiCortex, the main goal Intel accomplished with Nehalem is relieving some of the memory bottleneck at the chip and node level -- something AMD did years ago with the Opteron. What Intel (or AMD for that matter) hasn't done, says Leonard, is address the node-to-node communication bottleneck, as SiCortex has done with its integrated interconnect architecture.
Kem Stewart, SiCortex's VP of hardware engineering, agrees, adding that Nehalem's integrated memory controller will help users with memory starvation problems as they turn on the third and fourth cores on those quad-core chips, but will do little to speed up applications that are fundamentally constrained by InfiniBand or Ethernet communication bandwidth. He notes this is often the case when a problem is scaled beyond a hundred cores or so.
According to Stewart, some of the company's customers have benchmarked their Nehalem EP machines and shared the results. Stewart says there weren't any real surprises performance-wise. In a program that scales well, customers noted a 20 percent performance bump compared to the older Harpertown-based systems. While that may be significant, it's not enough motivation to do a fork-lift upgrade.
SiCortex has its own challenges, however. Because it has thrown its lot in with MIPS, it misses out on the established x86 software ecosystem that's been building for decades. From its point of view, the underlying instruction set barely matters anymore since application dependencies have been freed from the ISA and moved up to the OS. In the case of HPC, this means Linux, and since SiCortex ships its own Linux implementation with its hardware, customers won't be concerned that MIPS is running underneath.
"For HPC customers x86 compatibility isn't all that big a deal," argues Leonard. "In the Linux world in particular, people are used to all sorts of architectures, and their main concern is that their scripts and other tools work."
What it has encountered is customers who need an ISV code that has not yet been ported to SiCortex. Leonard admits the list is not very big at the moment, but he says the portfolio is growing fast. According to the company, ISV porting requests more than doubled during last quarter. Since the onus of re-targeting is on the software vendors, the ISVs want to make sure that new ports don't cannibalize license sales derived from other architectures. So the degree to which ISVs are motivated to add SiCortex versions is an indication of how much they believe the company can expand the market independently of other system vendors.
Of course, SiCortex could decide to switch gears and license Intel's low-power Atom design if it wanted to join the x86 masses. Doing so would maintain the company's green theme, but building a new SoC based on a different CPU would be a huge investment of time and money, and from what I gathered from Leonard and Stewart, they didn't see Atom as the kind of technology worthy of a redesign. Besides, there's plenty of life left in MIPS and no doubt SiCortex will be upgrading its 700MHz 90nm SoC hardware in due time. A glimpse of what's possible with MIPS is revealed by RMI's announcement (PDF) of its upcoming 2.0 GHz, 40nm SoC for the embedded market, although I expect the next move from SiCortex will be 65nm and something around 1.0 GHz.
If SiCortex did have second thoughts about a new architecture, there are plenty of other low-power designs from which to choose -- everything from ARM and PowerPC to Tensilica's exotic Xtensa technology. For its part, SiCortex hasn't revealed any plans that would take the company down a different path, but it's keeping its options open. "It would be foolish for anybody in our position not to be looking at alternatives," says Leonard.
Posted by Michael Feldman - April 09, 2009 @ 5:47 PM, Pacific Daylight Time
Michael Feldman is the editor of HPCwire.
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