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Blog: From the Editor

From the Editor | Main Blog Index

Westmere Ushers in the Second Coming of Multicore


The Intel launch of the Westmere EP processors managed to dominate most of my attention this week. But with the debut of AMD's Magny-Cours chips less than two weeks away and the upcoming release of the first NVIDIA Fermi Tesla products just around the corner, it's shaping up to be an interesting year for HPC users looking to buy new gear.

With the 6-core Westmere EP (Xeon 5600), 8-core Nehalem EX (Xeon 7500), and 12-core Magny-Cours (Opteron 6100) CPUs all soon to be available at your local server outlet, x86 users will all of the sudden be looking at double-digit core counts on mainstream dual-socket servers and workstations. As I mentioned in a blog a couple of weeks ago, one of the results of the post quad-core era will be a renewed attraction to desktop or deskside machines that can run HPC jobs that previously had to be shipped off to small clusters. That would represent a big change in how bite-sized technical computing applications get serviced.

An article this week in Cadalyst, talked about how next-gen workstations could dramatically change the workflow for industries relying on HPC:

In years past, these technical and creative professionals — in fields as diverse as oil and gas exploration, architecture, product development, and animation — were valued for their expertise, but often placed in advisory or support roles. They were consulted to analyze, prove, or finish existing projects or designs but not considered part of the mainstream production or design process. In effect, these valuable team members were treated as consultants in their own companies. Why? Because their work was so compute-intensive it would interrupt the project workflow if mainstreamed. Their computer requirements were expensive and thus used sparingly.... The increased need for processing power is one reason many of these specialists are outside the production workflow. Their demands on existing IT are so great that their work would slow down other work processes.

Since virtualization technology is now ubiquitous and more intimately supported in the latest x86 silicon, these mini-SMP workstations can even act as multiple machines. The Cadalyst piece describes a scenario in which a geophysicist could run a Linux session and a Windows session concurrently on the same platform, taking advantage of different software tools for geophysical visualization and analysis. You can do that in a cluster as well, but the real-time interaction is the feature that makes this sort of thing so valuable to the end user.

HPC system vendors have already glommed on to the Westmere parts and have announced the upgrades to their personal HPC machines. In particular, both Cray and SGI are moving up to the Xeon 5600 parts in their CX1 and Octane III deskside supers, respectively. AMAX is also moving up to the Westmere generation in its HPC lineup, including its workstations. BOXX, a company that specializes in high-end visualization workstations, has also announced it's offering Westmere CPUs in its renderBOXX modules and 3DBOXX workstations. In fact, it's fairly certain that any HPC vendor with Nehalem-based gear will transition to Westmere at some point.

And while March 2010 may mark the beginning of the end for the quad-core CPU era, the other shoe is about to drop. According to reliable sources, NVIDIA is on track to begin taking orders for Fermi Tesla 20-series products in "early Q2," which, if you haven't glanced at a calendar lately, is less than two weeks away. (The first non-HPC Fermi products, the GTX 470 and 480, are slated to be released next week according to the NVIDIA.) Fermi, of course, is NVIDIA's latest CUDA processor architecture that brings loads more double-precision capability, ECC memory, and C++ support into the GPGPU computing realm. And none of this 6-, 8-, and 12-core stuff. Fermi scales to 512 cores.

Since virtually all system vendors that sell personal HPC systems also offer a Tesla option, these new double-digit-core x86 workstations and mini-clusters will soon have some serious GPGPU company. Westmere-Fermi workstations with teraflop power -- and I'm talking double precision here -- could soon be standard office gear for scientists and engineers.

That's not to say high performance computing clusters are on their way out. Large-scale technical computing still relies on scaled-out clusters, and those types of problems tend to gobble up any expansion in computational capability. High-fidelity global climate simulations aren't likely to be done on a souped-up workstation anytime soon. Also, there are still HPC applications that don't map all that well to the GPU, and others that don't take kindly to the widening gap between CPU cores and memory. In those cases, it's better to spread memory and, perhaps more importantly, memory bandwidth, across larger numbers of relatively low-core-count CPUs with a cluster architecture.

The chip vendors, for their part, are working hard to overcome these obstacles. Fermi will likely be the most programmer-friendly GPU ever to come along, and is designed to act more like a general-purpose vector processor than a graphics processor retro-fitted for HPC duty. Likewise, Intel and AMD are working to pump up the memory support on their latest silicon. Although the Westmere is basically a 32nm process shrink of Nehalem, it also includes a tweaked memory controller that supports more bandwidth and capacity as well as lower powered DDR3 DIMMs. Meanwhile, AMD bumped Magny-Cours to four memory channels to keep up with the increased core count.

All this wonderful new silicon won't transform high performance computing overnight. It's a slow process to migrate end-user applications onto new architectures. ISVs and their clients have become comfortable with the traditional cluster-workstation separation. This latest generation of CPUs and GPUs is going to shake that up.

Posted by Michael Feldman - March 18, 2010 @ 5:23 PM, Pacific Daylight Time

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Michael Feldman

Michael Feldman

Michael Feldman is the editor of HPCwire.

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