From the Editor | Main Blog Index
June 17, 2010
If you've been following this publication even casually for the past four years or so, I'm sure you realize that a lot of digital ink has been spilled about the ascent of GPUs in high performance computing. This week was no exception. Part of this interest is due to the fact that, as HPC goes, GPU computing is one of the industry's more exciting topics. After all, major processor transitions in supercomputing only occur once every 20 years or so, and we seem to be in one of them now.
This tends to happens as new chips promising better performance per dollar come to the fore. The fact the GPUs can also deliver superior performance per watt is especially relevant now, given that post-petascale computing will require much more energy-efficient processing than that afforded by traditional CPUs.
The excitement doesn't stop there. From the code jockey's point of view, what could be more fun than having to rewrite your software for an entirely new processor architecture? Well, the truth is that a lot of programmers (and their masters) don't see that as fun at all. Outside of the halls of academia, the dominant mantra of software developers is: "If it ain't broke, don't fix it." And that's one of largest impediments to GPU computing today. Despite CUDA, OpenCL, and whatever other programming frameworks get layered on top of them, writing code for data-parallel architectures like GPUs requires real work by skilled programmers.
But throughout the history of HPC, rewriting applications for new architectures is the rule, not the exception. Developers have transitioned from vector chips to scalar ones, and are now making the arduous trek to parallel processors. Whether that architecture turns out to be a general-purpose GPU along the lines of NVIDIA's Fermi processor, an integrated heterogeneous design, such as AMD's Fusion accelerated processing units (APUs), or something else is still unknown.
That something else could be Intel's revamped Larrabee processor. Since the chipmaker has re-entered the HPC accelerator sweepstakes with its plans to build a purpose-built data parallel computing chip -- an x86-based manycore design known as the Many Integrated Core (MIC) architecture -- the GPU computing juggernaut could get derailed before it really gets going. But since we're not likely to see a commercial product for a couple of years, the GPGPU contingent has a pretty big head start on anything Intel will come up with.
Of course, it could be argued that the different trajectories of the three chip vendors will produce uniquely useful solutions for a variety of data parallel platforms. But I think it's more likely that the current diversity of architectures on the table will eventually be honed down to just one in the not-so-distant future. If history is a guide, the HPC market tends to coalesce around an architecture that fits the market conditions of the times.
The current dominance of x86-based Linux clusters drives home the point. The HPC community didn't decide that distributed memories, MPI programming, and the x86 instruction set was exactly what supercomputers needed for the terascale age. Rather it was cheap commodity processors and open source software that drove how HPC systems would be shaped for more than a decade.
Today, no one would argue that commodity clusters represent the optimal solution for HPC, either performance-wise, management-wise, from an energy efficiency standpoint, or for ease of programming. But we rarely get optimal solutions for HPC (or for anything, really). In fact, we never get them. Optimal solutions are the stuff of marketing brochures and utopian novels.
In a recent ZDNet blog, NAG's Andy Jones looked into his crystal ball, wondering if GPU-type processors would become the next big thing in supercomputing. He noted that the last transition, from RISC CPUs to x86, was relatively painless because software tools and support for the latter architecture were already abundant. For GPU computing, he points out, this is not the case. Andy also notes the lack of a standard data parallel architecture:
Perhaps most critically, the various GPU-like options of, say, Fusion, Knights and Fermi are sufficiently diverse not to make it a simple choice between CPU vs GPU. The lesson from the past was that good code with long life expectancy could be developed without knowing upfront if it was to run on Opteron or Xeon.
In his judgement, though, all these issues will only slow adoption, and the community seems to be coming to the same conclusion. In the past few months, IBM, Cray, SGI, Dell, Bull, Appro and a host of less prominent HPC players have announced GPU-accelerated HPC systems, or at least plans to build them. Berkeley's Dave Patterson, University of Tennessee's Jack Dongarra, and Tokyo Tech's Satoshi Matsuoka have all endorsed GPU computing and now figure prominently in NVIDIA slide decks. Over the next couple of years, as supercomputing centers roll out their GPU-equipped supers, more teraflop-level GPGPU workstations show up on desktops, and Intel fields their MIC processors, we'll have a better sense of how this transition is going to occur.
Posted by Michael Feldman - June 17, 2010 @ 6:21 PM, Pacific Daylight Time
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Michael Feldman is the editor of HPCwire.
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