Visit additional Tabor Communication Publications
November 15, 2010
SGI has made good on its promise to create a petaflop-in-a-cabinet supercomputer that can scale up to tens and even hundreds of cabinets. Developed under the code name "Project Mojo," the company has dubbed the new product Prism XL. SGI will be showcasing the system this week in their exhibit booth at the Supercomputing Conference in New Orleans.
Not surprisingly, the Prism system relies on accelerator technology to deliver so much computational brawn. Specifically, SGI is supporting configurations with NVIDIA Tesla GPUs, AMD/ATI GPUs, and Tilera processors. The central idea was to create an open and scalable platform that exploited all the advantages of accelerator technology, namely lower cost, better energy efficiency, and a smaller footprint. According to Bill Mannel, SGI's VP of product marketing, what they've achieved with Prism is a system that costs about 25 percent less than a comparable x86-based supercomputer, and in just one-tenth the floor space.
Computational density was a central goal of Project Mojo. "Around this time last year, a set of SGI executives, including myself, sat in a room in Austin Texas and asked 'How can we put a petaflop in a single cabinet?'" explains Mannel. "And that was how the Project Mojo product got started."
The design went through a number of iterations. The original focus was on ATI GPUs since, at least at the time, they offered the most performant processors. (Arguably they still do; the top-end ATI Radeon 5970 chip delivers 4.64 single precision teraflops or 928 double precision gigaflops.) Mannel says that customer feedback drove them to a more general-purpose design that could accommodate virtually any accelerator that was PCIe-friendly.
The first Prism systems available in December can be ordered with NVIDIA Tesla M2050 or M2070 modules, AMD FireStream 9370 ("Osprey") cards, or 64-core Tilera processor. In January, SGI intends to add support for the AMD FireStream 9350 ("Kestrel"). Mannel says SGI is also considering offering the aforementioned Radeon HD 5970 as an option at some point. Presumably Prism could also be equipped with Intel's upcoming Many Integrated Core (MIC) "Knights Corner" accelerator further down the road. SGI wouldn't commit to a future MIC offering, other than to say that they are "giving it serious consideration."
The Prism design centers around maximizing the number of PCIe interfaces, and thus the number of accelerator cards, that can be packed into a standard rack. Each of the slots are PCIe Gen 2 x16 interfaces, so every accelerator can enjoy full I/O bandwidth to the motherboard. The slot can draw up to 300 watts, which is designed to accommodate all current accelerator cards -- the current crop of GPGPUs top out at about 250 watts -- as well as all future ones on the major vendors' roadmaps.
The basic component of a Prism system is a "stick," a modular enclosure that is indeed stick-like -- 5.78 inch wide, 3.34 inch high, and 37 inches deep. Each one is powered by a 1050 watt power supply, and despite the density, the whole apparatus is air-cooled. A 42U rack can be outfitted with up to 63 sticks, in a 3-by-21 honeycomb pattern. The sticks are very much plug and play; you can actually take one out of a rack and plug it into a wall socket in a lab or office should you need to do some local development work.
Inside each stick are two of what SGI calls "slices", which are essentially nodes. Each slice is comprised of a CPU, one double-wide or two single wide accelerators, and up to two SATA disks. The CPU chosen for this task is an AMD Opteron 4100 "Lisbon" processor, which is housed on a "node board." SGI opted for the no-frills, lower-power Lisbon processor (basically half a Magny-Cours Opteron) since its principle function is to drive the accelerator, rather than delivering a lot of compute on its own. Up to four DDR3 memory slots, operating at 1333 MHz, are available on the node board.
The default network is GigE, but a separate low profile PCIe slot is available on each slice for an InfiniBand adapter-- either single plane or dual plane. This PCIe interface could theoretically be used to stuff another accelerator onto the node (and customers have asked for such an option), but SGI doesn't currently support that configuration. The company also doesn't support a 10 GbE option yet, although there's nothing preventing the customer from plugging in their own adapters. One might wonder why SGI just didn't slap an InfiniBand or 10 GbE chip down on the node board, but it looks like the rationale was to minimize the common infrastructure as much as possible, and let the customers upscale the configuration as needed via all the PCIe slots.
Since each stick has two slices, a maximally configured one can house 2 CPUs and 4 GPUs. This is how SGI is able to get their peak petaflop in a single cabinet. A cabinet in this case is what SGI calls their M-Rack, an extra-wide double rack with a switch rack in the middle. Since it's basically two 42U compute racks, you can house 500 single-wide GPUs in it. If those are 2 teraflop AMD FireStream 9350s, you've got your petaflop, but just single precision.
Of course, many HPC customers are going to opt for NVIDIA's Fermi GPUs, since they have up-market features like ECC memory, which is crucial for a lot of heavy-duty computing. In this case though, a cabinet would only yield about 250 single precision teraflops. Of course since the Prism is designed for future accelerators, it won't be too many years before we'll be getting a full double precision petaflop in a cabinet.
SGI is targeting Prism at market segments that contain the most enthusiastic early adopters of HPC accelerators, namely oil and gas, media/rendering, education, research, defense/intelligence, and bio/pharma. A number of companies in these areas have already deployed accelerator-based machines -- mostly GPU-equipped servers -- and these customers would be the ones most likely interested in scaling up to a Prism XL.
The Tilera acceleration option is somewhat of a different animal. In this case, the user is not concerned with FLOPS, since these manycore processors are rather weak in the floating point department. The intention here is to deliver lots of integer operations in a very power-efficient package. The 64-core Tilera chip delivers 443 billion operations per second, yet consume only about 20 watts. According to Mannel, Tilera deployments are intended to be used in places where FPGA acceleration has been used in the past, for example, in encryption, image and signal processing; network packet inspection, web/content delivery, and media format conversion.
Unlike FPGAs, Tilera processors can be programmed with conventional tools and language frameworks, making application development and maintenance much less complicated. That wouldn't necessarily rule out a future FPGA accelerator for Prism though. Mannel, in fact, says a few customers are interested in such an option.
With all different accelerator options, SGI is relying mainly on third-party vendors for software support. This includes compilers, drivers, and libraries from NVIDIA, AMD and Tilera for their respective hardware. SGI is also packaging development tools from Allinea, CAPS Enterprise, Portland Group, and Rogue Wave. For job scheduling, they offer Altair PBS Professional, which is conveniently accelerator-aware, while SGI's own Management Center is used for system management. OS support for the initial offering is Red Hat RHEL 5.5 and CentOS 5.5.
As of this writing, Prism XL pricing was not available, but one would expect to pay some premium compared to vanilla CPU-GPU server-based systems on the market today. The first Prisms will be available for shipping in December.
Jun 18, 2013 |
The world's largest supercomputers, like Tianhe-2, are great at traditional, compute-intensive HPC workloads, such as simulating atomic decay or modeling tornados. But data-intensive applications--such as mining big data sets for connections--is a different sort of workload, and runs best on a different sort of computer.
Jun 18, 2013 |
Researchers are finding innovative uses for Gordon, the 285 teraflop supercomputer housed at the San Diego Supercomputer Center (SDSC) that has a unique Flash-based storage system. Since going online, researchers have put the incredibly fast I/O to use on a wide variety of workloads, ranging from chemistry to political science.
Jun 17, 2013 |
The advent of low-power mobile processors and cloud delivery models is changing the economics of computing. But just as an economy car is good at different things than a full size truck, an HPC workload still has certain computing demands that neither the fastest smartphone nor the most elastic cloud cluster can fulfill.
Jun 14, 2013 |
For all the progress we've made in IT over the last 50 years, there's one area of life that has steadfastly eluded the grasp of computers: understanding human language. Now, researchers at the Texas Advanced Computing Center (TACC) are utilizing a Hadoop cluster on its Longhorn supercomputer to move the state of the art of language processing a little bit further.
Jun 13, 2013 |
Titan, the Cray XK7 at the Oak Ridge National Lab that debuted last fall as the fastest supercomputer in the world with 17.59 petaflops of sustained computing power, will rely on its previous LINPACK test for the upcoming edition of the Top 500 list.
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
Join HPCwire Editor Nicole Hemsoth and Dr. David Bader from Georgia Tech as they take center stage on opening night at Atlanta's first Big Data Kick Off Week, filmed in front of a live audience. Nicole and David look at the evolution of HPC, today's big data challenges, discuss real world solutions, and reveal their predictions. Exactly what does the future holds for HPC?
Join our webinar to learn how IT managers can migrate to a more resilient, flexible and scalable solution that grows with the data center. Mellanox VMS is future-proof, efficient and brings significant CAPEX and OPEX savings. The VMS is available today.