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April 21, 2011
AUSTIN, Texas, April 21 -- The Texas Advanced Computing Center (TACC) at The University of Texas at Austin today announced that it will collaborate with Intel Corp. to help prepare the national open science research community to take full advantage of the new capabilities of Intel's forthcoming "many integrated core" (MIC) processor line.
Intel has provided TACC with a software development platform for MIC processors (code-named "Knights Ferry") on which TACC is already porting software. Later in 2011, TACC and Intel will deploy a cluster using the Intel MIC architecture-based platform to explore scalability across nodes. TACC and Intel will jointly present the results of porting HPC applications to the MIC platform at the annual Supercomputing conference in November 2011. Intel will also provide TACC with early access to its first commercial MIC processors (code-named "Knights Corner"), enabling TACC to ensure that applications achieve maximum performance on the first MIC production processors.
TACC joins more than 100 other Intel partners working to optimize software for MIC processors, but is the first National Science Foundation (NSF) TeraGrid institution to partner with Intel to support the national open science community. The TeraGrid is the world's largest, most comprehensive distributed cyberinfrastructure for open scientific research.
"As a leader in deploying cutting-edge supercomputing systems, TACC is constantly evaluating new technologies to accelerate computation," said Dan Stanzione, TACC's deputy director. "We see the Intel MIC processor line as an exciting leap forward, and we are ecstatic about working with Intel to explore application performance on this new platform."
Future MIC processors from Intel are being designed to achieve tremendous performance for applications that possess a high degree of data parallelism. Typical applications expected to see benefit from the Intel MIC processors include molecular dynamics and quantum chemistry, as well as emerging data-intensive applications such as seismic imaging, sensor network analysis, and real-time analytics. Such applications are common in science and engineering research and development, and in business, academia, and government laboratories.
"We are delighted to support TACC in the task of building a robust set of applications for Intel's MIC architecture," said Anthony Neal-Graves, vice president, Intel Architecture Group, general manager, many integrated core computing, Intel. "The Intel MIC architecture, along with our Intel Atom, Intel Core and Intel Xeon processors create a complete portfolio of optimized solutions for a broad set of mainstream HPC workloads. Our future Intel MIC products will enable customers like TACC to draw on decades of x86 code development and optimization techniques."
Many research enterprises have recently begun evaluating the performance capabilities of graphics cards for their data-parallel applications, but such efforts require extensive re-coding of software, a labor- and cost-intensive process.
"We believe that the familiar programming model and toolset provided by MIC will be very attractive to our user and developer community, and we'll work with our user community and Intel to identify and optimize key science research applications," Stanzione continued.
TACC has a successful history of supporting open science on Intel-based HPC systems, including offering the first terascale Intel-based Linux cluster to the national open science community in 2003. TACC recently deployed Lonestar 4, the most powerful Intel Xeon-based high performance computing system in the NSF TeraGrid.
Last year, Intel disclosed that it will build its MIC processors using the company's forthcoming 22-nanometer manufacturing process and the chips will scale to more than 50 Intel processing cores on a single chip.
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