Visit additional Tabor Communication Publications
May 26, 2011
There was plenty of GPU computing in the HPC news stream this week, but I'm going to focus on two announcements, since they're somewhat at odds with each other -- but not really.
The first is Cray's big announcement of its Tesla-equipped XK6 super. The company has been talking up this system up for awhile and finally got the chance to spill the details on it thanks to NVIDIA's launch last week of the second-generation Fermi GPU technology.
The system is not your garden-variety GPU cluster, though. The XK6 blade is a variant of the XE6 and like its CPU-only sibling is designed to scale well into multi-petaflops territory. A single rack will deliver about 70 teraflops. The blade will actually be using the X2090, a compact form factor variant of the new M2090 part, but the innards are supposedly identical.
Cray, though, is pointing to its software environment as the technology that really makes the XK6 something special. Although NVIDIA's CUDA SDK comes standard with each system, Cray is also developing its own GPU compiler for C and Fortran, based on OpenMP extensions for accelerators. Their compiler is still in a pre-production state, but Cray will be handing it out to selected customers to kick the tires.
The idea is to provide programmers with a standard directives-based language environment for GPU computing. Since the developer need only insert directives to tell the compiler which pieces need to be GPU-ified, it's a lot easier to convert existing CPU codes, compared to doing a CUDA port. The resulting directive-enhanced source can then be ported to other accelerator platforms, assuming they support the OpenMP accelerator extensions too. Or the directives can be stripped out if a standard CPU platform is all you have.
Cray is also supporting PGI's GPU-capable compiler, which is directives-based as well, but it's not an open standard like OpenMP. PGI and CAPS enterprise (which has its own HMPP directives for GPU computing) could of course adopt the OpenMP accelerator directives, and undoubtedly would do so if that version became the choice of developers. Given that OpenMP has a very strong following in the HPC community, it wouldn't surprise me if developers opted for this particular solution.
Also, since both PGI and CAPS are on the OpenMP board, I'd venture to say that there will be a meeting of the minds over accelerator directives in the not-too-distant future. By the way, Intel is on the board too, so it's conceivable that OpenMP acceleration will be supported for the upcoming Knights Ferry MIC processor as well.
The only caveat to a directives-based approach to programming GPU is that of performance. Something like CUDA or OpenCL can get much closer to the silicon and thus offer better performance if you know what you're doing. The problem is a lot of developers don't know what they're doing -- as a former software engineer, I say this without blushing -- and in any case would prefer not to have to worry about the nitty-gritty details of GPU programming. Also, for the reasons stated above, there are significant advantages to building GPU codes in a high-level, hardware-independent language environment.
Cray is already tuning their OpenMP-based GPU compiler for performance. With their knowledge of all things vector, I expect they'll eventually get to a happy place performance-wise. Certainly if such a programming model can shave a few months or even a few weeks off of development time, you have a lot more cycles to play with simply because you have a working program in hand.
The second high-profile GPU news item this week involved a successful GPU port of a machine learning algorithm by Pittsburgh Supercomputing Center (PSC) and HP Labs. In this case what I mean by successful is that the researchers achieved a 10X speedup of the algorithm using CUDA and an NVIDIA GPU-based system, compared to the equivalent code targeted for a CPU cluster. The system encompassed three nodes, with three GPUs and two CPUs per node. MPI was used for node-to-node chatter.
The algorithm in question, called k-means clustering, is used in machine learning to uncover patterns or association within large datasets. In this case, they used Google's "Books N-gram" dataset to cluster all five-word sets of the one thousand most commonly used words occurring in all books published in 2005. With their GPU implementation, the researchers were able to cluster the entire dataset (15 million data points and 1000 dimensions) in less than nine seconds.
While that particular application might not be the most useful one ever invented, machine learning has a big place in data analytics generally. That includes a lot of HPC-type informatics work -- genomics, proteomics, etc. There's even the equivalent in the humanities, called culturomics, which is essentially the analysis of datasets having to do with human cultures. Basically any application that does data correlations across large datasets can make use of this method.
The CUDA version of this machine learning algorithm not only out-performed the CPU implementation (straight C) by a factor of 10, it was 1,000 times faster than an unspecified high-level language implementation used in machine learning research.
Ren Wu, principal investigator of the CUDA Research Center at HP Labs, developed the k-means clustering code for GPUs used by PSC. In the announcement he had plenty of nice things to say about CUDA:
"I think that the CUDA programming model is a very nice framework, well balanced on abstraction and expressing power, easy to learn but with enough control for advanced algorithm designers, and supported by hardware with exceptional performance (compared to other alternatives). The key for any high-performance algorithm on modern multi/many-core architecture is to minimize the data movement and to optimize against memory hierarchy. Keeping this in mind, CUDA is as easy, if not easier, than any other alternatives."
Whether Wu could have extracted similar performance from an OpenMP accelerator programming implementation or something similar is questionable. Clearly there are going to be situations where using CUDA (or OpenCL) is warranted. This will be especially true for library routines/algorithms that are used across a wide variety of applications, and whose speed is critical to the application's performance. For data parallel algorithms that are local to specific applications, a more high level approach may be the way to go.
We've certainly been here before with assembly code and high-level languages. Both have established their place in software development. Similarly we're going to see high-level and low-level GPU programming frameworks moving forward together and it's going to be up to the programmer to know when to apply each.
Posted by Michael Feldman - May 26, 2011 @ 7:27 PM, Pacific Daylight Time
Michael Feldman is the editor of HPCwire.
No Recent Blog Comments
In a recent solicitation, the NSF laid out needs for furthering its scientific and engineering infrastructure with new tools to go beyond top performance, Having already delivered systems like Stampede and Blue Waters, they're turning an eye to solving data-intensive challenges. We spoke with the agency's Irene Qualters and Barry Schneider about..
Large-scale, worldwide scientific initiatives rely on some cloud-based system to both coordinate efforts and manage computational efforts at peak times that cannot be contained within the combined in-house HPC resources. Last week at Google I/O, Brookhaven National Lab’s Sergey Panitkin discussed the role of the Google Compute Engine in providing computational support to ATLAS, a detector of high-energy particles at the Large Hadron Collider (LHC).
The Xeon Phi coprocessor might be the new kid on the high performance block, but out of all first-rate kickers of the Intel tires, the Texas Advanced Computing Center (TACC) got the first real jab with its new top ten Stampede system.We talk with the center's Karl Schultz about the challenges of programming for Phi--but more specifically, the optimization...
May 22, 2013 |
At some point in the not-too-distant future, building powerful, miniature computing systems will be considered a hobby for high schoolers, just as robotics or even Lego-building are today. That could be made possible through recent advancements made with the Raspberry Pi computers.
May 16, 2013 |
When it comes to cloud, long distances mean unacceptably high latencies. Researchers from the University of Bonn in Germany examined those latency issues of doing CFD modeling in the cloud by utilizing a common CFD and its utilization in HPC instance types including both CPU and GPU cores of Amazon EC2.
May 15, 2013 |
Supercomputers at the Department of Energy’s National Energy Research Scientific Computing Center (NERSC) have worked on important computational problems such as collapse of the atomic state, the optimization of chemical catalysts, and now modeling popping bubbles.
May 10, 2013 |
Program provides cash awards up to $10,000 for the best open-source end-user applications deployed on 100G network.
May 09, 2013 |
The Japanese government has revealed its plans to best its previous K Computer efforts with what they hope will be the first exascale system...
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
In this demonstration of SGI DMF ZeroWatt disk solution, Dr. Eng Lim Goh, SGI CTO, discusses a function of SGI DMF software to reduce costs and power consumption in an exascale (Big Data) storage datacenter.
The Cray CS300-AC cluster supercomputer offers energy efficient, air-cooled design based on modular, industry-standard platforms featuring the latest processor and network technologies and a wide range of datacenter cooling requirements.