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November 02, 2011
Sandia National Labs made a bit of HPC history this week when it announced it had installed the first HPC cluster outfitted with AMD's Accelerated Processing Units (APUs), based on the chipmakers 'Fusion' processor design. The chip integrates x86 CPU cores and ATI GPU cores onto the same processor.
This is an experimental system only, to be used as a platform to evaluate the CPU-GPU heterogenous processor model of supercomputing. Currently, AMD's Fusion chips are designed for personal computing platforms and are not intended for servers. But apparently Sandia's Scalable Computer Architectures group was eager enough to get their hands on an APU cluster to contract Penguin and AMD to be build them a system.
According to the press release, the Penguin system, known as the Altus 2A00, was specifically designed with AMD APUs in mind. The QDR InfiniBand-based cluster is comprised of 104 servers, which houses an unspecified number AMD A8-3850 APUs.
Designed for desktop PC duty, the A8-3850 a quad-core x86 design integrated with 400 Radeon (HD 6550D) cores. The CPU cores run at 2.9 GHz, while the GPU side runs at a more modest 600 MHz. TDP is a respectable 100 watts.
The whole cluster delivers 59.6 peak teraflops, but the idea here is not to break any performance records. The Sandia researchers will use the machine to explore programming models for integrated CPU-GPU platforms, relying primarily on OpenCL and MPI. The draw here is to be able to access the considerable vector capabilities of the GPU within the same memory space as the CPU.
The rationale for such research is that heterogeneous processors such as these APUs will be the basis for future exascale computers. In a roundtable discussion organized by AMD on Wednesday, AMD Technology Group CTO Chuck Moore noted that while their x86 server CPUs, like their new Interlagos Opterons, continue to make strides, those designs will likely not be the path to exaflop performance by the end of this decade.
"Instead what we need to do is to make really good use of heterogenous computing," said Moore. "By combining the best of CPU and GPU technology, presumably on the same chip, we believe we can build computing nodes that are on the order of 10 teraflops in that timeframe."
According to him, AMD has plans in the works for an "HPC APU that would utilize even a larger GPU and fewer x86 core" than the current desktop chips. He thinks the company can build HPC APUs that run about 150 watts and would be powerful enough to power an exaflop computer that consumes no more than 20 MW. And, thanks to the integrated CPU-GPU memory space, these machines would be reasonably easy to program.
The Xeon Phi coprocessor might be the new kid on the high performance block, but out of all first-rate kickers of the Intel tires, the Texas Advanced Computing Center (TACC) got the first real jab with its new top ten Stampede system.We talk with the center's Karl Schultz about the challenges of programming for Phi--but more specifically, the optimization...
Although Horst Simon was named Deputy Director of Lawrence Berkeley National Laboratory, he maintains his strong ties to the scientific computing community as an editor of the TOP500 list and as an invited speaker at conferences.
Supercomputing veteran, Bo Ewald, has been neck-deep in bleeding edge system development since his twelve-year stint at Cray Research back in the mid-1980s, which was followed by his tenure at large organizations like SGI and startups, including Scale Eight Corporation and Linux Networx. He has put his weight behind quantum company....
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The Cray CS300-AC cluster supercomputer offers energy efficient, air-cooled design based on modular, industry-standard platforms featuring the latest processor and network technologies and a wide range of datacenter cooling requirements.