November 29, 2011
16GT/s increases I/O bandwidth, scaling the interconnect to meet emerging application requirements
BEAVERTON, Ore., Nov. 29 -- PCI-SIG, the organization responsible for the widely adopted PCI Express (PCIe) industry-standard input/output (I/O) technology, today announced the approval of 16 gigatransfers per second (GT/s) as the bit rate for the next generation of PCIe architecture, PCIe 4.0. This decision comes after the PCI-SIG completed a feasibility study on scaling the PCIe interconnect bandwidth to meet the demands of a variety of computing markets.
After technical analysis, the PCI-SIG has determined that 16GT/s on copper, which will double the bandwidth over the PCIe 3.0 specification, is technically feasible at approximately PCIe 3.0 power levels. The data also confirms that a 16GT/s interconnect can be manufactured in mainstream silicon process technology and can be deployed with existing low-cost materials and infrastructure, while maintaining compatibility with previous generations of PCIe architecture. In addition, the PCI-SIG will investigate advancements in active and idle power optimizations, key issues facing the industry.
"The PCI Express architecture has become the de facto I/O technology within the industry, in large part due to PCI-SIG's dedication to I/O innovation and the insight of those who defined earlier versions in such an extensible manner," said Nathan Brookwood, research fellow at Insight 64. "Like its predecessors, the PCIe 4.0 architecture is well positioned to preserve the industry's investments in earlier generations of PCI Express specifications while extending the technology in a manner that enables new applications and usage models."
Approximately 24 billion lanes of PCIe have shipped in the marketplace since its introduction--a strong testament to the industry's reliance on PCIe architecture as an open bus standard now and for the future. This next-generation PCIe architecture, while doubling the data rate, will maintain its position as a low-cost, high-performance I/O technology. PCIe 4.0 technology will maintain backward compatibility with previous PCIe architectures and provide the optimum design point for high-volume platform I/O implementations across a wide range of existing and emerging applications. The PCIe 4.0 specification will address the many applications pushing for increased bandwidth at a low cost including server, workstation, desktop PC, notebook PC, tablets, embedded systems, peripheral devices, high-performance computing markets and more.
"Experts in the PCIe Electrical Workgroup carefully analyzed a number of target bit rates for the next generation of PCIe architecture, taking into consideration several key factors, including our ability to continue using low-cost materials. We have concluded that 16GT/s is a feasible technical solution that satisfies our member companies' requirements," said Al Yanes, PCI-SIG chairman. "While the preliminary analysis is encouraging, a lot more challenging work lies ahead in developing the specifications. The PCI-SIG looks forward to providing our members with a specification that not only satisfies their high performance requirements but also meets their power, cost and compatibility goals."
The final PCIe 4.0 specifications, including form factor specification updates, are expected to be available sometime in the 2014-2015 timeframe.
Join PCI-SIG
PCI-SIG members can participate in the review of all PCI specifications before they are released to the industry. PCI-SIG members develop and maintain PCIe specifications, including the PCIe 4.0 specification, and are actively involved in defining compliance criteria and other technical enabling collateral.
As an additional and extremely valuable benefit of PCI-SIG membership, members are given the right to receive patent licenses from any other member of the organization with necessary claims of patent embodied within the specifications. These licenses may be limited in scope to an implementation of a particular specification, but must be granted to all members on reasonable and non-discriminatory terms. To join the PCI-SIG, visit www.pcisig.com/membership .
About PCI-SIG
PCI-SIG is the consortium that owns and manages PCI specifications as open industry standards. The organization defines industry standard I/O (Input/Output) specifications consistent with the needs of its members. Currently, there are more than 10,000 individuals participating from the PCI-SIG's more than 800 industry-leading member companies. For more information and a list of the board of directors, visit www.pcisig.com .
-----
Source: PCI-SIG
During a conversation this week with Cray CEO, Peter Ungaro, we learned that the company has managed to extend its reach into the enterprise HPC market quite dramatically--at least in supercomputing business terms. With steady growth into these markets, however, the focus on hardware versus the software side of certain problems for such users is....
Read more...
Contributing commentator, Andrew Jones, offers a break in the news cycle with an assessment of what the national "size matters" contest means for the U.S. and other nations...
Read more...
Today at the International Supercomputing Conference in Leipzing, Germany, Jack Dongarra presented on a proposed benchmark that could carry a bit more weight than its older Linpack companion. The high performance conjugate gradient (HPCG) concept takes into account new architectures for new applications, while shedding the floating point....
Read more...
Jun 19, 2013 |
Supercomputer architectures have evolved considerably over the last 20 years, particularly in the number of processors that are linked together. One aspect of HPC architecture that hasn't changed is the MPI programming model.
Read more...
Jun 18, 2013 |
The world's largest supercomputers, like Tianhe-2, are great at traditional, compute-intensive HPC workloads, such as simulating atomic decay or modeling tornados. But data-intensive applications--such as mining big data sets for connections--is a different sort of workload, and runs best on a different sort of computer.
Read more...
Jun 18, 2013 |
Researchers are finding innovative uses for Gordon, the 285 teraflop supercomputer housed at the San Diego Supercomputer Center (SDSC) that has a unique Flash-based storage system. Since going online, researchers have put the incredibly fast I/O to use on a wide variety of workloads, ranging from chemistry to political science.
Read more...
Jun 17, 2013 |
The advent of low-power mobile processors and cloud delivery models is changing the economics of computing. But just as an economy car is good at different things than a full size truck, an HPC workload still has certain computing demands that neither the fastest smartphone nor the most elastic cloud cluster can fulfill.
Read more...
Jun 14, 2013 |
For all the progress we've made in IT over the last 50 years, there's one area of life that has steadfastly eluded the grasp of computers: understanding human language. Now, researchers at the Texas Advanced Computing Center (TACC) are utilizing a Hadoop cluster on its Longhorn supercomputer to move the state of the art of language processing a little bit further.
Read more...
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
Join HPCwire Editor Nicole Hemsoth and Dr. David Bader from Georgia Tech as they take center stage on opening night at Atlanta's first Big Data Kick Off Week, filmed in front of a live audience. Nicole and David look at the evolution of HPC, today's big data challenges, discuss real world solutions, and reveal their predictions. Exactly what does the future holds for HPC?
Join our webinar to learn how IT managers can migrate to a more resilient, flexible and scalable solution that grows with the data center. Mellanox VMS is future-proof, efficient and brings significant CAPEX and OPEX savings. The VMS is available today.