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December 21, 2011
CAPS to Add Compiler Support for Intel MIC
SANTA CLARA, Calif., Dec. 21 -- CAPS will add a new back-end to its HMPP directive-based compiler that will allow developers to unleash the performance of the Intel Many Integrated Core (MIC) architecture. First experimentations with scientific applications have shown very promising performance results.
Pioneer in the directive-based approach with its HMPP hybrid compiler, CAPS has been delivering parallel programming software tools, solutions and expertise for more than 10 years and helps organizations to adapt the way their applications are developed in order to benefit from the performance of multi-core and many core architectures.
"We are really excited that MIC is coming on the market", says François Bodin - CAPS CTO, "and we are happy to make MIC easily accessible by our customers through HMPP. We are also continuing work in the OpenMP standards committee, with Intel and many others, for OpenMP offload extensions that will offer a standard to fully support Intel MIC as well as other devices."
"CAPS brings expertise and products that will be valued by software developers using the Intel Many Integrated Core architecture," said James Reinders, Director, Intel. "We are pleased to work with CAPS and see our customers have the opportunity to enjoy CAPS on Intel MIC co-processors as they already do with Intel processors."
About CAPS entreprise
CAPS is a major supplier of solutions dedicated to application migration and deployment on manycore processors. CAPS global solutions for manycore lead the developer to performance by providing top-of-the-range technology (HMPP hybrid compiler and wizard), code porting methodology and ecosystem. Its directive-based & multi-target HMPP compiler enables developers to safely move to hybrid CPU / GPU model and leverage the computing power of stream processors without the pain associated to GPU programming. HMPP is offered within CAPS DevDeck package: an ALL-IN-ONE multi-level suite for manycore application definition, porting and optimization with tools, methodology and resources.
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Source: CAPS entreprise
Discussion
There are 7 discussion items posted.
help writing a cv
Submitted by jaffa
on Aug 7, 2012 @ 5:00 AM EDT
The program execution might be likened to reading a book. While a person will normally read each word and line in sequence, they may at times jump back to an earlier place in the text or skip sections that are not of interest. Thanks a lot.
Post #1
kitchen sinks canada
Submitted by jaffa
on Aug 21, 2012 @ 2:40 AM EDT
Intel Many Integrated Core Architecture or Intel MIC, multiprocessor computer architecture developed by Intel incorporating earlier work on the Larrabee many core architecture, the Teraflops Research Chip multicore chip research project and the Intel Single chip Cloud Computer multicore microprocessor. Thanks.
Post #2
Submitted by shopia
on Dec 24, 2012 @ 1:23 AM EST
Bestech's most awaited Ultra Luxury 3/4+Family Lounge+SQ Apartments and Penthouses of sizes 2660-3480sqft approx @ sector-81,Gurgaon.
Post #3
Submitted by shopia
on Dec 24, 2012 @ 1:24 AM EST
Bestech is coming up with their most awaited ULTRA LUXURY Projects.
Post #4
Submitted by materkate
on Jan 17, 2013 @ 6:04 AM EST
A good step towards the better performance of the Many Integrated Core. This will ensure the best results in the upcoming models. Regards,
Post #5
Creative Bioscience
Submitted by jaffa
on Mar 1, 2013 @ 3:55 AM EST
Due to the design being intended for GPU as well as general purpose computing the Larrabee chips also included specialised hardware for texture sampling. Thanks. Regards,
Post #6
Creative Bioscience
Submitted by jaffa
on Mar 1, 2013 @ 3:56 AM EST
The purpose of the chip is to explore the possibilities of Tera-Scale architecture the process of creating processors with more than four cores and to experiment with various forms of networking and communication within the next generation of processors. Thanks.
Post #7
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