HPCwire Job Bank
HPCwire

Since 1986 - Covering the Fastest Computers
in the World and the People Who Run Them

Language Flags

Visit additional Tabor Communication Publications

Datanami
Digital Manufacturing Report
HPC in the Cloud

The Power to Flop


It has been a little over three years since IBM's Roadrunner supercomputer gained the distinction of first to crack the petaflop barrier and over 15 years since the ASCI Red broke the teraflop mark. Assuming that advancements in technology continue as expected, the exaflop line should be crossed roughly around the year 2018.

One factor that seems to be the main roadblock on the path to exascale computing is power consumption. Let's take for example the ratio of power consumed between the ASCI Red and IBM's Roadrunner. According to the TOP500 list, the ASCI Red broke the teraflop barrier consuming 850 KW of power and the IBM Roadrunner hit the petaflop mark while using 2,483 KW. So along with the advancements in technology between 1996 and 2008, the ratio of processing power/watt increased.

Since the exascale barrier has not been broken, let's turn to the number one supercomputer on the TOP500 list, Japan's K computer, which has recently crossed the 10 petaflop mark, and uses 12,659 KW of power. Compared to the first petaflop supercomputer, the K machine consumes more than 5 times the wattage to deliver just 10 times the processing power. Although this is an improvement over installing 10 Roadrunner supercomputers to achieve the same amount of processing power, it's quite far off the mark from the teraflop/petaflop gap in wattage.

So maybe the answer to exaflop computing is advancements in the processor manufacturing process, processor management, and certainly system design. A traditional driver for supercomputer advancements has been DARPA, who has been funding the Ubiquitous High Performance Computing (UHPC) for the past couple of years. While UHPC is not explicitly aimed at designing exascale systems, it certainly is targeting technologies that are applicable to such machines.

But according to a recent article by Indiana University's Thomas Sterling in The Exascale Report, it is likely that the UHPC program will not extend beyond its first phase. The original idea was to fund four phases, the last of which would have produced a proof-of-concept platform. The DOE may be the agency that takes up the exascale slack, but Sterling is clearly worried about the lack of will by policy makers to support such work.

Internationally, there does seems to be momentum building behind the exascale push. Sterling mentions both the International Exascale Software Project (IESP) and the European Exascale Software Initiative (EESI), as important programs to move the ball forward. The EESI is notable inasmuch as is does not depend upon a leading role from the US.

Asia, too, seems to have struck out on its own. Sterling is impressed that the Japanese, with the K computer, have managed to produce an original architecture that, for the time being, leaves the competition in the dust. He also expects to see similar originality from the Chinese, who appear to be committed to deploying cutting-edge supercomputers, designed and built domestically.

Sterling's advice at this point is that the US should team up with the international community for the good of HPC. Given that financial resources, talent, and good ideas are now more globally distributed than they were in the run up to terascale and petascale computing, this may be the most practical way forward. "The US may not own the Exascale space," concludes Sterling.


Full story at The Exascale Report

HPCwire on Twitter

Discussion

There are 0 discussion items posted.

Join the Discussion

Join the Discussion

Become a Registered User Today!


Registered Users Log in join the Discussion

May 23, 2012

May 22, 2012

May 21, 2012

May 18, 2012

May 17, 2012

May 16, 2012

May 15, 2012

May 14, 2012

May 11, 2012

May 10, 2012


Most Read Features

Most Read Around the Web

Most Read This Just In

DataDirect Networks

Feature Articles

NVIDIA Works On CPU Co-Dependency Issues with Kepler GPU

NVIDIA is telling everyone that the GK110, its new Kepler GPU aimed at supercomputing, is all about improving performance per watt. But the other driving theme behind the new architecture is reducing the GPU's reliance on its CPU host. How well it accomplishes both these goals areas could determine the success of the new chip in high performance computing.
Read more...

OpenACC Starts to Gather Developer Mindshare

PGI, Cray, and CAPS enterprise are moving quickly to get their new OpenACC-supported compilers into the hands of GPGPU developers. At NVIDIA's GPU Technology Conference this week, there was plenty of discussion around the new HPC accelerator framework, and all three OpenACC compiler makers, as well as NVIDIA, were talking up the technology.
Read more...

NVIDIA Launches Kepler Into HPC

NVIDIA has introduced its first Kepler-generation GPU product for high performance computing, and revealed some of the inner working of the new architecture. The announcement took place at the kickoff of the company's GPU Technology Conference taking place this week in San Jose, California.
Read more...

Sponsored Whitepapers

Sponsored Multimedia

ISC Think Tank 2012

Newsletters

Exxact

HPC Job Bank


Featured Events







HPC Wire Events