Visit additional Tabor Communication Publications
August 28, 2012
SAN JOSE, Calif., Aug. 28 -- Altera Corporation today announced its OpenCL (Open Computing Language) for FPGAs Early Access Program (EAP), enabling customers to get a first look at Altera's OpenCL for FPGA solution. Leveraging the open standard dramatically simplifies FPGA development by enabling teams to design their systems and algorithms in a high-level C-based framework when targeting FPGAs. As part of the EAP, customers will be able to preview Altera's OpenCL solution and receive access to an OpenCL for FPGA training course, collateral and technical demonstrations.
OpenCL is an open standard for writing programs that execute across heterogeneous platforms, including CPUs, GPUs and FPGAs. OpenCL provides customers a significant time-to-market advantage compared to traditional FPGA development flows that require the user to design in a lower-level HDL (hardware description language). Customers joining the EAP will see how OpenCL can simplify many of the time-consuming details of hardware design by allowing users to operate in a C-based environment and automatically generate the FPGA implementation.
In addition to simplifying FPGA development, EAP customers will also discover how using OpenCL in an FPGA implementation provides dramatic system performance advantages. Combining an inherently parallel language with the massively parallel performance capabilities of FPGAs delivers significantly higher performance compared to alternate hardware architectures.
"There has been a tremendous amount of excitement from designers interested in integrating an OpenCL development flow with FPGAs. With very positive results from initial customers we are pleased to be able to give more customers early access to preview the solution," said Jeff Waters, senior vice president and GM of Altera's Military, Industrial and Computing division. "OpenCL enables a broad segment of designers in a variety of end markets including high-performance computing, military, medical and broadcast to dramatically increase the performance of their end systems using the latest generation of FPGAs and a highly productive development flow."
Altera is currently engaged with a variety of customers to implement designs in FPGAs using an OpenCL flow. These customers have seen the productivity and performance benefits that can be achieved using OpenCL for FPGA development.
Koumei Tomida, Manager, Controller Platform Development V, Controller Development Group, at Fuji Xerox commented, "Using an OpenCL flow for FPGAs is intriguing as it gives us access to the latest generation of high-performance FPGAs, while providing us a significant reduction in time to market. Based on our initial use of Altera's OpenCL tool, we have been able to quickly and easily optimize our OpenCL kernels to target Altera FPGAs for higher performance and seamlessly integrate our design into the high-performance fabric of an FPGA."
OpenCL for Altera FPGAs Training Now AvailableAltera has partnered with Acceleware, the industry leader in OpenCL and parallel programming training, to offer a course titled "OpenCL for Altera FPGAs" which provides detailed training on the OpenCL language and how to use it with Altera FPGAs. The course is available for OpenCL EAP customers only and will be held in a variety of regions. Contact your local Altera sales representative to schedule a training session.
Joining the OpenCL for FPGA Early Access ProgramCustomers who join the OpenCL EAP will receive the latest information from Altera representatives on the OpenCL tool and how it works. Customers will also receive early access to product documentation and periodic information from Altera about the OpenCL program. To join, contact your local Altera sales representative.
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGA, CPLD and ASIC devices at www.altera.com . Follow Altera via Facebook, RSS and Twitter.
The Xeon Phi coprocessor might be the new kid on the high performance block, but out of all first-rate kickers of the Intel tires, the Texas Advanced Computing Center (TACC) got the first real jab with its new top ten Stampede system.We talk with the center's Karl Schultz about the challenges of programming for Phi--but more specifically, the optimization...
Although Horst Simon was named Deputy Director of Lawrence Berkeley National Laboratory, he maintains his strong ties to the scientific computing community as an editor of the TOP500 list and as an invited speaker at conferences.
Supercomputing veteran, Bo Ewald, has been neck-deep in bleeding edge system development since his twelve-year stint at Cray Research back in the mid-1980s, which was followed by his tenure at large organizations like SGI and startups, including Scale Eight Corporation and Linux Networx. He has put his weight behind quantum company....
May 16, 2013 |
When it comes to cloud, long distances mean unacceptably high latencies. Researchers from the University of Bonn in Germany examined those latency issues of doing CFD modeling in the cloud by utilizing a common CFD and its utilization in HPC instance types including both CPU and GPU cores of Amazon EC2.
May 15, 2013 |
Supercomputers at the Department of Energy’s National Energy Research Scientific Computing Center (NERSC) have worked on important computational problems such as collapse of the atomic state, the optimization of chemical catalysts, and now modeling popping bubbles.
May 10, 2013 |
Program provides cash awards up to $10,000 for the best open-source end-user applications deployed on 100G network.
May 09, 2013 |
The Japanese government has revealed its plans to best its previous K Computer efforts with what they hope will be the first exascale system...
May 08, 2013 |
For engineers looking to leverage high-performance computing, the accessibility of a cloud-based approach is a powerful draw, but there are costs that may not be readily apparent.
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
In this demonstration of SGI DMF ZeroWatt disk solution, Dr. Eng Lim Goh, SGI CTO, discusses a function of SGI DMF software to reduce costs and power consumption in an exascale (Big Data) storage datacenter.
The Cray CS300-AC cluster supercomputer offers energy efficient, air-cooled design based on modular, industry-standard platforms featuring the latest processor and network technologies and a wide range of datacenter cooling requirements.