Visit additional Tabor Communication Publications
October 30, 2012
From germanium to silicon and finally down to carbon. Back in the 1940s, scientists at Bell Labs purified germanium, a heavier element in the carbon/silicon family, used to make the first transistors. For the last several decades, scientists have been making smaller and smaller transistors out of silicon, doubling the transistor density every twelve to eighteen months, in accordance with Moore's Law.
Computing advances rely on the continued exponential growth of transistors per chip. However, there is a finite amount that silicon transistors can shrink, and there are signs that the trend has already slowed. While transistor density continues to increase, "clock speed," or the speed at which the transistors can turn on and off, has not. As such, processing in parallel to overcome this limitation has gained increased importance.
Carbon nanotubes would hypothetically kill two birds with one stone. Earlier this year, IBM presented a paper that demonstrated the ability of carbon to act as a transistor across just ten nanometers – half the size of silicon. Further, semi-conducting carbon provides a friendlier environment for electron movement. From a computing standpoint, that means data can be transported at higher speeds and that transistors can be more easily switched. This ultimately increases efficiency of the device by a factor of five to ten.
The issue with carbon nanotubes that prevented their consistently being turned into transistors is that they consist of both semi-conductive and metallic material. While the semi-conductive carbon nanotubes allow electrons to shift along them easier, the metallic side does not. As such, great pains have to be taken to sift out the metallic. Further, like their silicon brethren, carbon nanotubes have to be placed delicately and in a controlled fashion on the chip.
If those obstacles can be overcome, the technology has the potential to surpass silicon as the preferred transistor material. "The motivation to work on carbon nanotube transistors is that at extremely small nanoscale dimensions, they outperform transistors made from any other material," said Supratik Guha, director of Physical Sciences at IBM Research.
According to him, carbon could outperform conventional silicon by a factor of five. "However," he said, "there are challenges to address, such as ultra-high purity of the carbon nanotubes and deliberate placement at the nanoscale."
To address those challenges, IBM came up with a chemical method to attract the semi-conducting material. By immersing a substrate consisting of hafnium oxide and silicon oxide into a liquid solution of carbon nanotubes, the semi-conductors attach themselves to the hafnium oxide. As a result, IBM was able to place ten thousand carbon-based transistors onto a wafer using standard semi-conductor processes.
Of course, today's silicon-bearing chips harbor millions of transistors, a number that is expected to rise into the billions within the next couple of years. So carbon nanotubes still have a long way to go.
With that being said, IBM beat previous efforts, which were only able to mount a few hundred working carbon transistors. The advancements from here will come from being able to separate out the metallic from the semi-conducting, a process which is continues to be refined. According to Guha, IBM is fairly confident that by the end of the decade, they will be able to ensure 99.99 percent purity, leading to a point where carbon may take over as the element of choice for next-generation computing.
The Xeon Phi coprocessor might be the new kid on the high performance block, but out of all first-rate kickers of the Intel tires, the Texas Advanced Computing Center (TACC) got the first real jab with its new top ten Stampede system.We talk with the center's Karl Schultz about the challenges of programming for Phi--but more specifically, the optimization...
Although Horst Simon was named Deputy Director of Lawrence Berkeley National Laboratory, he maintains his strong ties to the scientific computing community as an editor of the TOP500 list and as an invited speaker at conferences.
Supercomputing veteran, Bo Ewald, has been neck-deep in bleeding edge system development since his twelve-year stint at Cray Research back in the mid-1980s, which was followed by his tenure at large organizations like SGI and startups, including Scale Eight Corporation and Linux Networx. He has put his weight behind quantum company....
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
In this demonstration of SGI DMF ZeroWatt disk solution, Dr. Eng Lim Goh, SGI CTO, discusses a function of SGI DMF software to reduce costs and power consumption in an exascale (Big Data) storage datacenter.
The Cray CS300-AC cluster supercomputer offers energy efficient, air-cooled design based on modular, industry-standard platforms featuring the latest processor and network technologies and a wide range of datacenter cooling requirements.