CONCORD, NH, Nov. 15 - BittWare, the leader in Altera-based FPGA COTS boards, announced today that Polybus has integrated their QDR Infiniband IP cores onto BittWare's Stratix V FPGA PCIe hardware. Polybus provides both QDR Infiniband Link Layer cores as well as QDR Infiniband Target Channel Adapter cores. Both cores have been proven and validated on BittWare's family of Stratix V FPGA PCIe boards, which includes the S5-PCIe (S5PE), a Stratix V PCIe board with DDR3 SDRAM, and the S5-PCIe-HQ (S5PH-Q), a Stratix V half-length PCIe board with DDR3 SDRAM and QDRII+ SRAM. Each board provides dual QSFP+ cages, enabling two Infiniband cores, with each core providing 32 Gbits/s of data throughput.

"Infiniband is heavily used in the world of high-performance computing, providing high throughput, low latency communications," stated Ron Huizen, VP of Technology at BittWare. "We are happy to have partnered with Polybus to provide their Infiniband IP cores on our proven, fully-validated Stratix V PCIe COTS platforms. The dual QSFP+ on each board allows two Infiniband QDR links, giving our customers a tremendous amount of bandwidth."

"BittWare is the industry leader in Altera Stratix FPGA COTS boards," said Josh Rosen, President at Polybus. "Working with them to ensure that our Infiniband IP cores would run on their Stratix V-based PCIe boards was great for us. The quality of their boards and the engineering talent behind their products made the process easy and efficient. We're very pleased that BittWare is the first Stratix V COTS vendor to support the Polybus Infiniband IP cores."

The S5PH-Q PCIe COTS board and QDR Infiniband core have been adopted by the High Performance Computing Division's Systems Integration Group at Los Alamos National Laboratory in a project funded by the Department of Defense.

QDR 4X InfiniBand Link Layer Core Overview

• 32 Gbits/s
• 128 bit parallel interfaces
• 4X operation
• Link initialization and training
• Link layer flow control
• CRC generation and checking
• Protocol error and packet length checking
• Programmable flow control period
• Dynamic flow control mechanism
• Available for 1, 2 and 8 virtual lanes
• IBA Rev 1.2.1 compliant 

QDR Target Channel Adapter Core

• 32 GBit/s
• Unreliable connect SEND and RDMA write
• Unreliable datagram SEND
• Cut-through and store and forward modes
• 1024 Queue Pairs
• Single or multiple data lanes
• 128 bit transmit and receive DMA interface for QDR
• IBA Version 1.2.1 compatible

S5-PCIe-HQ Overview

• High density Altera Stratix V GX/GS FPGA
• PCIe x8 interface supporting Gen1, Gen2, or Gen3
• Dual QSFP+ cages for QDR Infiniband [or 40GigE] direct to the FPGA for lowest possible latency
• Anemone floating point co-processor (optional)
• Up to 16 GBytes DDR3 SDRAM, and up to 72 MBytes QDRII/II+
• Two SATA connectors
• Timestamping support
• Utility I/O includes: USB 2.0, RS-232, and JTAG

S5-PCIe Overview

• High density Altera Stratix V GX/GS FPGA
• PCIe x8 interface supporting Gen1, Gen2, or Gen3
• Dual QSFP+ cages for QDR Infiniband [or 40GigE] direct to the FPGA for lowest possible latency
• Expansion site for Anemone co-processors to add 76.8 GFLOPs of floating point performance
• Up to 32 GB of DDR3 SDRAM with optional ECC
• Utility I/O includes: USB 2.0, RS-232, and JTAG

Availability

BittWare's S5PH-Q and S5PE boards are both available today with the QDR Infiniband cores from Polybus.

About Polybus Systems Corp

Polybus offers SDR, DDR and QDR InfiniBand cores for Altera Stratix V FPGAs. The DDR and QDR InfiniBand Target Channel Adapter cores support UC SEND, UC RDMA Write and UD SEND operations. Polybus has been in business since 1989 and is the world's leading provider of Infiniband cores.

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Source: BittWare