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December 06, 2012
With the recent introduction of Intel's first Xeon Phi coprocessors, NVIDIA's latest Kepler GPUs, and AMD's new FirePro S10000 graphics card, the competition for HPC chip componentry has entered a new phase. The three chipmakers have taken somewhat different paths though, and it will be up to the market to decide which vendor's approach will win the day.
It is tempting to think that their might be room for all three accelerator designs in the market, but as it stands today that's unlikely. The HPC space is too small and homogeneous to support that much architectural diversity. Just consider how CPU side has, for the most part, consolidated to a single ISA (the x86), and to a large degree, a single vendor (Intel). While there may be a case to be made that these accelerators can offer different advantages for different applications, in their current incarnation they all are built principally as vector accelerators for CPU hosts.
That implies that the chip design that does that best, that is, delivers the most application FLOPS per dollar and per watt, will be the HPC consumer's top choice -- unless you believe that one or the other of these platforms will be substantially easier to program than the others. We'll get to that particular aspect in a moment.
First though, it's worthwhile just looking at the specs for the three accelerators. All of them offer teraflop-plus double precision performance with several gigabytes of ECC memory, but not all with the same power draw. And it's the performance per watt that is most likely to become the driving criteria for many HPC users as they try to squeeze maximum FLOPS from a static datacenter power supply.
The NVIDIA Tesla K20X is the one to beat in this regard. It offers 1.3 teraflops in a 235 watt package, -- so 5.6 gigaflops/watt. Intel's new "Knights Corner" Xeon Phi, the 5110P, delivers 1.011 teraflops with a TDP of 225 watts, which works out to 4.5 gigaflops/watt. The AMD FirePro S10000 card that sports two "Tahiti" GPUs, is rated at 1.48 teraflops. But the FirePro draws 375 watts, so its 3.9 gigaflops/watt is the actually the lowest of the bunch.
The FirePro does somewhat better in the single precision FP department, delivering 15.8 gigaflops/watt to the K20X's 16.8 gigaflops/watt and the 5110P's 9.0 gigaflops/watt (estimated). But if you're really focused on single precision performance, the go-to device is NVIDIA K10, which delivers over 20 gigaflops/watt.
Memory-wise, the Intel 5110P is tops with 8 GB and 320 GB/sec of bandwidth. The K20X is supplied with 6 GB and 250 GB/sec, so less capacity, but with roughly the same bandwidth per byte. The new FirePro is also equipped with 6 GB, but at 450 GB/sec, offers considerably more bandwidth. That's all with ECC turned off though, so your actual mileage will vary depending on the error correction smarts on each of these platforms.
It's not surprising that NVIDIA's silicon specs out so well here. They've been the dominant player in the accelerator business for the last several years and have spent a lot of time designing the devices for this role. But the hardware alone will not be the sole determinant. Porting applications to these accelerators and getting them to draw on those abundant FLOPS will be the biggest challenge.
It is here that Intel is believes it has an advantage. The company's line has been that existing programs, using just standard MPI and OpenMP as the framework for parallelism, will port to the Xeon Phi platform with a simple recompile and link. And while that's true, that doesn't necessarily guarantee good performance. In fact, it is more that likely that porting applications that lend themselves to vector acceleration on Xeon Phi will have to be modified in ways not so different than what is done for GPUs -- namely splitting the code across the CPU and accelerator, such that performance is optimized across the serial and parallel parts of the application.
Until there are a number of well-known HPC applications running on the Xeon Phi, proof of easy porting with impressive performance are just claims. And in any case, OpenMP's new accelerator directives are supposed to level the software playing field across all these platforms -- at least with regard to a standard high-level software framework. As of today though, that standard has not been ratified and it's not clear if GPUs will be supported adequately on the initial go-around, which, given the current accelerator landscape, sort of defeats the purpose for a hardware-independent API.
This is just the beginning of the accelerator era of high performance computing, or perhaps more accurately, the end of the beginning. Especially with Intel's entrance into the space, the accelerator model for high performance computing has been legitimized in a way that NVIDIA could not have done on its own. And while accelerators are not the be-all and end-all of HPC, right now they are driving much of the rapid performance gains we see in the industry.
That means the stakes are high for all three vendors. Whoever comes out on top is likely to establish themselves as the dominant supercomputing chip-maker for the latter half of the petascale era and the first part of the exascale era, when the technology will almost certainly be integrated into the CPU die. With Intel, NVIDIA, and AMD now focusing more interest in their accelerator lines, we're apt to see an even more rapid evolution of the hardware and the software.
May 23, 2013 |
he study of climate change is one of those scientific problems where it is almost essential to model the entire Earth to attain accurate results and make worthwhile predictions. In an attempt to make climate science more accessible to smaller research facilities, NASA introduced what they call ‘Climate in a Box,’ a system they note acts as a desktop supercomputer.
May 22, 2013 |
At some point in the not-too-distant future, building powerful, miniature computing systems will be considered a hobby for high schoolers, just as robotics or even Lego-building are today. That could be made possible through recent advancements made with the Raspberry Pi computers.
May 16, 2013 |
When it comes to cloud, long distances mean unacceptably high latencies. Researchers from the University of Bonn in Germany examined those latency issues of doing CFD modeling in the cloud by utilizing a common CFD and its utilization in HPC instance types including both CPU and GPU cores of Amazon EC2.
May 15, 2013 |
Supercomputers at the Department of Energy’s National Energy Research Scientific Computing Center (NERSC) have worked on important computational problems such as collapse of the atomic state, the optimization of chemical catalysts, and now modeling popping bubbles.
May 10, 2013 |
Program provides cash awards up to $10,000 for the best open-source end-user applications deployed on 100G network.
05/10/2013 | Cleversafe, Cray, DDN, NetApp, & Panasas | From Wall Street to Hollywood, drug discovery to homeland security, companies and organizations of all sizes and stripes are coming face to face with the challenges – and opportunities – afforded by Big Data. Before anyone can utilize these extraordinary data repositories, however, they must first harness and manage their data stores, and do so utilizing technologies that underscore affordability, security, and scalability.
04/15/2013 | Bull | “50% of HPC users say their largest jobs scale to 120 cores or less.” How about yours? Are your codes ready to take advantage of today’s and tomorrow’s ultra-parallel HPC systems? Download this White Paper by Analysts Intersect360 Research to see what Bull and Intel’s Center for Excellence in Parallel Programming can do for your codes.
In this demonstration of SGI DMF ZeroWatt disk solution, Dr. Eng Lim Goh, SGI CTO, discusses a function of SGI DMF software to reduce costs and power consumption in an exascale (Big Data) storage datacenter.
The Cray CS300-AC cluster supercomputer offers energy efficient, air-cooled design based on modular, industry-standard platforms featuring the latest processor and network technologies and a wide range of datacenter cooling requirements.