HPC researcher Eduardo Marques has received a grant from the São Paulo Research Foundation (FAPESP) to investigate the use of field-programmable gate-arrays (FPGAs) and graphics processor units (GPUs) to boost throughput in custom HPC machines.
For decades, chip makers delivered steady improvements in processing capacity by devising better lithographic etching techniques that allowed them to cram ever more transistors on a circuit and increase the frequency, phenomenon that gave rise to Moore’s Law. However, chip designers today are reaching the physical limits in how small the circuits can be shrunk and how fast chips can run before the heat becomes overwhelming.
In response, general purpose and HPC server makers have turned to co-processors to deliver the added oomph that today’s large business and scientific workloads demand. By programming GPUs and FPGAs to handle parallel tasks, server makers can continue to deliver increases in computing power without sacrificing energy efficiency or programmability. Today, some of the world’s most powerful supercomputers use GPUs, such as those from NVIDIA.
Marques will conduct his research into FGPAs and GPUs at the University of São Paulo’s Instituto de Ciências Matemáticas e de Computação (ICMC). Marques’ project, titled “Custom heterogeneous hardware acceleration for high-performance computing applications,” will investigate an HPC architecture that uses GPUs and FGPAs as co-processors or traditional processors to deliver efficiencies in energy consumption and programmability, according to his abstract.
“In this architectural organization,” Marques’ abstract states, “the FPGAs/GPUs act as co-processors or a traditional processor units and carry out specific computations for which they can be custom-programmed to be extremely powerful and computing efficient. Their flexibility thus allows them to achieve orders of magnitude better performance than conventional computing systems via customization. In terms of the overall system-level programming this “master-slave” model is very intuitive to grasp and can be easily implemented as part of the back-end of a traditional compiler.”
Marques is listed as the principal investigator on the project. Assisting with the project will be Joao Manuel Paiva Cardoso, a researcher with the University of Portugal. The project is being funded by FAPESP, an independent public foundation dedicated to fostering research and development in science and technology in the Brazilian state of São Paul.
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