June 17 — NCSA’s Private Sector Program and Intel are offering two free training classes on parallel programming using the Intel Xeon Phi coprocessors. These workshops provide the foundation needed for software developers to modernize their codes to extract more of the parallel compute performance potential found in both Intel Xeon processors and Intel Xeon Phi coprocessors.
The one-day introductory seminar (CDT 101) will be held Aug. 4 at the NCSA Building, 1205 W. Clark St., Room 1040. The session will cover:
- Offload and Native: “Hello World” to complex, using MPI
- Performance Analysis: VTune.
- Case Study: All aspects of tuning in the N-body calculation.
- Optimization I: Strip-mining for vectorization, parallel reduction.
- Optimization II: Loop tiling, thread affinity.
For more information and to register to CDT 101, visit http://events.r20.constantcontact.com/register/event?oeidk=a07eb4pjb94bacaca43&llr=kpiwi7pab.
Following on Aug. 5 is a one-day, hands-on laboratory (CDT 102) that will cover:
- Intel Xeon Phi architecture: purpose, organization, pre-requisites for good performance, future technology
- Programming models: native, offload, heterogeneous clustering
- Parallel frameworks: automatic vectorization, OpenMP, MPI
- Optimization methods: general, scalar math, vectorization, multithreading, memory access, communication and special topics
For more information and to register for CDT 102, visit http://events.r20.constantcontact.com/register/event?oeidk=a07eb4prtdtcf202357&llr=kpiwi7pab.
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Source: NCSA