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June 24, 2005
Cooling System Helps Chips Beat Heat
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Developed at the Georgia Institute of Technology, the wafer-level fabrication technique includes polymer pipes that will allow electronic and cooling interconnections to be made simultaneously using automated manufacturing processes. The low-temperature technique, which is compatible with conventional microelectronics manufacturing processing, allows fabrication of the microfluidic cooling channels without damage to integrated circuits.
The on-chip microfluidic technique was described June 7th at the eighth annual IEEE International Interconnect Conference in San Francisco, CA. The research was sponsored by the Microelectronics Advanced Research Corporation (MARCO) and the Defense Advanced Research Projects Agency (DARPA).
"This scheme offers a simple and compact solution to transfer cooling liquid directly into a gigascale integrated (GSI) chip, and is fully compatible with conventional flip-chip packaging," said Bing Dang, a Graduate Research Assistant in Georgia Tech's School of Electrical and Computer Engineering. "By integrating the cooling microchannels directly into the chip, we can eliminate a lot of the thermal interface issues that are of great concern."
As the power density of high-performance integrated circuits increases, cooling the devices has become a more significant concern. Conventional cooling techniques, which depend on heat sinks on the backs of ICs to transfer heat into streams of forced air, will be unable to meet the needs of future power-hungry devices - especially 3D multi-chip modules that will pack more processing power into less space.
High temperatures can cause early failure of the devices due to electromigration. By controlling average operating temperature and cooling hot-spots, liquid cooling can enhance reliability of the integrated circuits, Dang noted. Lower operating temperatures also mean a smaller thermal-excursion between silicon and low-cost organic package substrates that expand at different rates.
Some liquid cooling techniques are already in production or at a research stage, circulating liquid through separate cooling modules attached to the integrated circuits, or through microchannels fabricated onto the back of chips using high-temperature bonding techniques. These approaches have disadvantages, including limited heat transfer through the modules and potential thermal damage to the chips caused by bonding temperatures that range from 400 to 700 degrees Celsius.
The Georgia Tech approach allows a simple monolithic fabrication of cooling channels directly onto integrated circuits using a CMOS-compatible technique at temperatures of less than 260 degrees Celsius.
"Once the integrated circuit is fabricated, it cannot withstand high temperatures without causing damage," said Dang. "People are looking at liquid cooling in all forms to solve the thermal issues affecting advanced integrated circuits, and the goal is to prevent damage to the chips. We have invented a new way to do it."
The Georgia Tech researchers, who include Paul Joseph, Muhannad Bakir, Todd Spencer, Paul Kohl and James Meindl, begin by etching trenches more than 100 microns deep on the back of the silicon wafer. They then spin-coat a layer of high-viscosity sacrificial polymer onto the back of the chip, filling in the trenches. Next, a simple polishing step removes excess polymer.
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