The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing
October 06, 2006
Netronome Systems, Inc., a provider of deep packet inspection, content flow and virtual machine technologies, has announced the availability of its first high-performance network co-processor card which is designed to significantly boost performance in IA/x86-based network and security applications. Designed for OEMs, the Netronome Flow Engine (NFE-i8000) can be used to increase performance of existing applications or as an easy-to-use development environment enabling users to quickly and develop high performance networking and security applications, speeding time to market by reducing development time for new or upgraded applications.
"IXP devices are a standard in the research community, so it is important for our academic research laboratory to have access to the latest IXP2855," said Tilman Wolf, D.Sc., assistant professor, Department of Electrical and Computer Engineering, University of Massachusetts. "PCI has been a bottleneck, and using the Netronome PCI Express interface is a huge step forward. The card is really loaded, not just in regards to IXP, but TCAM and PKI accelerator as well. Additionally, the high speed low latency from IXP to IA is very important to us as we see IA/IXP coupling as an important area for our research."
Leveraging the Netronome developed PCI Express interface and "zero copy" drivers along with the Intel IXP2855 network processor and Intel IXCP210 cryptographic accelerator, the NFE-i8000 acts as a tightly integrated network co-processor for IA/x86 servers, supporting up to 4 Gbps throughput with high performance encryption. Additional features include:
Additionally, the NFE-i8000 hardware cryptography acceleration includes an integrated symmetric crypto unit, integrated asymmetric public key co-processor and true random number generator. A mezzanine expansion connector provides support for future co-processors such as pattern matching etc.
"IXP-based applications (IXP1200, IXP2400 and IXP2800) make up a considerable part of the market, over time the challenges with network performance, bus capacity and the amount of power they require have become more apparent," said Niel Viljoen, CEO of Netronome. "We designed the NFE-i8000 to address these needs and provide three overall benefits to application developers: increased performance and lower power consumption for existing applications, a high performance PCI Express interface and the ability to cut the time and cost typically associated with bringing new products to market."
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There was a new energy at this year's TeraGrid '09 conference thanks to an outstanding turnout for the student program. Thanks to support from the National Science Foundation, more than 100 high school, undergraduate and graduate students were able to participate in the conference.
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Paul Avery, a recognized leader in advanced grid and networking for science, delivered the first keynote address at the recent TeraGrid '09 conference in Arlington, Virginia. A professor of physics at the University of Florida, Avery is co-principal investigator and founding member of the Open Science Grid (OSG). Avery talked about the history of OSG, some of the projects that leverage its resources, and OSG's relationship with TeraGrid.
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Before he even took the podium, Ed Seidel was one of the buzz makers at the TeraGrid '09 conference. The day before his keynote, it was announced that he was stepping in as acting assistant director of the National Science Foundation's math and physical sciences directorate. For his talk at the conference, however, Seidel focused on the issues and efforts within his home at NSF, the Office of Cyberinfrastructure.
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Jul 09 | Engineer Live | The demand for computational tools to underpin the 3D seismic interpretation process has never been more apparent. Read more...
Jul 08 | EE Times | Unemployment for U.S. engineers has reached record levels, according to government figures. Read more...
Jul 08 | Network World | Global spending for 2009 projected to drop 6 percent, for a total of $3.2 trillion. Read more...
Jul 08 | Linux Magazine | Portability or efficiency? Neither is guaranteed when writing explicit parallel code. Read more...
Jul 07 | Ars Technica | Japanese company builds custom ASIC to accelerate real-time ray traced rendering for the auto industry. Read more...
Apr 14 | | Many HPC IT departments are feeling the rising pressure to deliver more capacity computing and performance while trying to reduce the total cost of ownership. This white paper discusses how an environmentally-friendly and open-standards HPC building block based computing system using flexible interconnect options helps address capacity computing needs.
Source: Addison Snell, GM/VP, Tabor Research; sponsored by Dell
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