HPCwire: Ga. Researchers Develop Programming Tools for Defense Needs

The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing

HPCwire >> Off the Wire

June 24, 2009

Ga. Researchers Develop Programming Tools for Defense Needs

June 24 -- Video gaming computers and video game consoles available today typically contain a graphics processing unit (GPU), which is very efficient at manipulating and displaying computer graphics. However, the unit's highly parallel structure also makes it more efficient than a general-purpose central processing unit for a range of complex calculations important to defense applications.

Researchers in the Georgia Tech Research Institute (GTRI) and the Georgia Tech School of Electrical and Computer Engineering are developing programming tools to enable engineers in the defense industry to utilize the processing power of GPUs without having to learn the complicated programming language required to use them directly.

"As radar systems and other sensor systems get more complicated, the computational requirements are becoming a bottleneck," said GTRI senior research engineer Daniel Campbell. "We are capitalizing on the ability of GPUs to process radar, infrared sensor and video data faster than a typical computer and at a much lower cost and power than a computing cluster."

Mark Richards, a principal research engineer and adjunct professor in the School of Electrical and Computer Engineering, is collaborating with Campbell and graduate student Andrew Kerr to rewrite common signal processing commands to run on a GPU. This work is supported by the U.S. Defense Advanced Research Projects Agency and the U.S. Air Force Research Laboratory.

The researchers are writing functions defined in the Vector, Signal and Image Processing Library (VSIPL) to run on GPUs. VSIPL is an open standard developed by embedded signal and image processing hardware and software vendors, academia, application developers and government labs. GPU VSIPL is available for download at http://gpu-vsipl.gtri.gatech.edu/.

The researchers are currently writing the functions in Nvidia's CUDA language, but the underlying principles can be applied to GPUs developed by other companies, according to Campbell. With GPU VSIPL, engineers can use high-level functions in their C programs to perform linear algebra and signal processing operations, and recompile with GPU VSIPL to take advantage of the speed of the GPU. Studies have shown that VSIPL functions operate between 20 and 350 times faster on a GPU than a central processing unit, depending on the function
and size of the data set.

"The results are not surprising because GPUs excel at performing repetitive arithmetic tasks like those in VSIPL, such as signal processing functions like Fourier transforms, spectral analysis, image formation and noise filtering," noted Richards. "We've just alleviated the need for engineers to understand the entire GPU architecture by simply providing them with a library of routines that they frequently use."

The research team is also assessing the advantages of GPUs by running a library of benchmarks for quantitatively comparing high-performance, embedded computing systems. The benchmarks address important operations across a broad range of U.S. Department of Defense signal and image processing applications.

Preliminary studies have shown several of the benchmarks have straightforward parallelization schemes that result in faster operation without requiring significant optimization. For other benchmarks, additional research needs to be conducted into optimizing the use of multiple GPUs.

For the future, the researchers plan to continue expanding the GPU VSIPL, develop additional defense-related GPU function libraries and design programming tools to utilize other efficient processors, such as the cell broadband engine processor at the heart of the PlayStation 3 video game console.

-----

Source: Abby Vogel, Georgia Institute of Technology

Article Tools

Share Options

(Digg, Technorati, more)

Subscribe

Subscribe to HPCwire

Discussion

There are 0 discussion items posted.

Join the Discussion

You must be a registered user in order to comment on HPCwire stories.

Members enjoy:

	Access to Special Content, including Podcasts, Webcasts, and Whitepapers and more!
	Ability to take an active role in the discussions that are shaping the HPC technology discipline!
	Special offers available only to HPCwire members!

Become a Registered User Today!

Registered Users Log in Here to Comment

Email Address:	Password (case sensitive)

Remember me	Forgot Password?

RSS Feeds

Feeds by Topic

Feeds by Industry

Feeds by Content Type

Feature Articles

The Week in Review

C-DAC announces plans for a petaflop system; IBM researchers are working on vertical integration techniques to extend Moore's Law another 15 years. We recap those stories and more in our weekly wrapup.
Read More...

Moscow State University Supercomputer Has Petaflop Aspirations

The Moscow State University supercomputer, Lomonosov, has been selected for a high-performance makeover, with the goal of tripling its processing power to achieve petaflop-level performance in 2010. T-Platforms, who developed and manufactured the supercomputer, is the odds-on favorite to lead the project.
Read More...

Intel Ups Performance Ante with Westmere Server Chips

Right on schedule, Intel has launched its Xeon 5600 processors, codenamed "Westmere EP." The 5600 represents the 32nm sequel to the Xeon 5500 (Nehalem EP) for dual-socket servers. Intel is touting better performance and energy efficiency, along with new security features, as the big selling points of the new Xeons.
Read More...

Read more HPCwire features...

Top Headlines

Australia Commissions Cray Supercomputer

Mar 19 | OfficialWire | New super to support intelligence work Down Under. Read more...

Intel Partners See 'Easy' Upgrade Path With Xeon 5600 Chips

Mar 18 | ChannelWeb | Westmere parts already showing up in HPC machines. Read more...

AMD: OEMs primed for Opteron 6100s

Mar 17 | The Register | But what about the tier ones? Read more...

Arrival of the Desktop Supercomputer

Mar 17 | Cadalyst Magazine | A new generation of workstations is changing the nature of technical computing. Read more...

Scheduling HPC In The Cloud

Mar 17 | Linux Magazine | Latest iteration of Sun Grid Engine able to tap into Cloud. Read more...

Read more headlines...

Featured Whitepapers

Virtualization for Aggregation And The vSMP Architecture™

Jan 12 | | In-depth look at vSMP Foundation server virtualization technology, technical implementation, use cases and capabilities. The technical whitepaper provides an architectural overview and details on the three vSMP Foundation products: vSMP Foundation for SMP, vSMP Foundation for Cluster and vSMP Foundation for Cloud.

Copper Cable Technologies for High Performance Computing

Jan 18 | | This white paper discusses Gore’s copper cable assemblies, and how they continue to exceed the standards for providing reliable, cost-effective solutions for high-performance computer applications.

View the White Paper Library

Multimedia

Webcast: Virtualized Data Center Roundtable

Join this online panel discussion for live Q&A with leading industry experts, analysts, and end-users to discuss the latest innovations, best practices, barriers to implementation, and measurable benefits of server virtualization with a particular focus on today's real world solutions.

Webcast: Watch SC09 Birds of a Feather Video: Scalable Fault-Tolerant HPC Supercomputers

Learn about scalable fault-tolerant architectures and examples of energy efficient and scalable supercomputing clusters using dual QDR InfiniBand to combine capacity computing with network failover capabilities with the help of programming languages such as MPI and a robust Linux cluster management package.

Webcast: High Performance Computing for a Smarter Planet

LIVE@SCO9: The IBM team discusses new innovations in hardware, software and services that help clients better understand their workloads and get insight from their R&D efforts. Technology demonstrations include the soon-to-be-released Power7 HPC processor, the DCS990 system with 2.4 petabytes of storage, the xCAT management tool, secure HPC cloud computing and more. Winners of two HPCwire Readers' and Editors’ Choice Awards! Take the IBM virtual tour at SC09 or more information go online to: http://www-03.ibm.com/systems/deepcomputing/sc09.html