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Tag: 3D chips

Stanford Group Creates Four-Layer Stacked Chip

Dec 18, 2014 |

With transistor scaling slated to come up against some fundamental limits over the next five to seven years, chip designers are hot on the trail of technologies to extend the exponential advances described by Moore’s law. One of the most promising areas of R&D involves stacking layers of logic and memory into 3D chips. The implementation Read more…

New Research Advances Heterogenous 3D Chip Design

Feb 6, 2014 |

As transistors approach the limits of miniaturization, the rapid pace of progress in the microprocessor industry is destined to start declining unless researchers are successful in innovating alternative designs. The best and brightest minds of our time are hard at work developing the next generation of microprocessors so essential to supercomputers, handheld devices and worldwide Read more…

HP Scientists Envision 10-Teraflop Manycore Chip

Mar 15, 2012 |

<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/HP_Corona_graphic.bmp” alt=”” width=”109″ height=”95″ />In high performance computing, Hewlett-Packard is best known for supplying bread-and-butter HPC systems, built with standard processors and interconnects. But the company’s research arm has been devising a manycore chipset, which would outrun the average-sized HPC cluster of today. The design represents a radical leap in performance, and if implemented, would fulfill the promise of exascale computing.

The Weekly Top Five

May 5, 2011 |

The Weekly Top Five features the five biggest HPC stories of the week, condensed for your reading pleasure. This week, we cover ISRO’s newest supercomputer; Tokyo Tech’s selection of EM Photonics’ CULA library; Intel’s 3-D transistor breakthrough; the latest LSF Tools from Platform Computing; and SciNet’s new NextIO GPU-based system.

3D Chip Technology Readies for Take Off

Mar 14, 2011 |

Three-dimensional chip stacking beings path to commercialization.

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